Over the past decades, transistors - the building blocks of the digital world - have been continuously scaled down in size, in order to increase performance and reduce power consumption, leading to better digital devices and an enhanced user experience.
In recent years, as the transistor has shrunk to a size now below a few tens of nanometers, the effort has created increasing challenges for every new generation of technology. One of the principle challenges has been undesirable leakage current, which now represents a significant proportion of the power consumption of the transistor.
Reaching the limits of bulk-silicon technology
In order to minimize the leakage while continuing to deliver high performance, bulk-silicon transistors have become ever more complex, adding additional levels of manufacturing challenges at an ever increasing rate. Truly Innovative solutions must continue to be found to deliver the full benefits of each advance in technology.
The FD-SOI innovations
In 2012, ST, together with its partners, introduced new innovations in silicon process technology: Fully Depleted Silicon On Insulator, or FD-SOI. FD-SOI is a planar process technology that delivers the benefits of reduced silicon geometries while enabling a simplification of the manufacturing process.
|FD-SOI relies on two primary innovations: First, an ultra-thin layer of insulator, called the buried oxide, that is positioned just below an ultra-thin channel—the second innovation. This channel differs from the conduction channel in traditional processes in that it does not contain dopants, thus making it Fully Depleted. The combination of those two innovations is called “ultra-thin body and buried oxide” or UTBB.
FD-SOI for boosted performance
An FD-SOI transistor can operate at frequencies up to 30% faster than the maximum frequency of an equivalent transistor manufactured using bulk CMOS, enabling faster processors to be built. This performance is enabled by improved transistor electrostatic characteristics and a shorter channel length. Furthermore the ultra-thin insulation layer prevents any leakage in the substrate, allowing much more effective body biasing and providing ideal control over the channel with two independent gates, the top and the buried gates.
FD-SOI enabling cooler devices
FD-SOI transistors can run extremely fast at low voltages, enabling much higher energy efficiency. The buried oxide layer efficiently confines the electrons flowing from the source to the drain, drastically reducing the unwanted leakage currents from the channel to the substrate. FD-SOI brings a significant improvement in power saving and makes an FD-SOI chip cooler than its bulk silicon counterpart.
FD-SOI ensures continuity with planar process and design
The manufacturing process for FD-SOI is also much simpler than alternatives and makes extensive use of existing fab infrastructure and manufacturing process, eliminating the need to make expensive new investments.
Moreover, FD-SOI technology is planar and makes use of same design rules as bulk planar technologies, making the porting of an existing design to FD-SOI extremely simple and fast.
FD-SOI is a scalable technology
The 28nm planar UTBB FD-SOI technology is available for production. The 14nm node is already in development and FD-SOI scalability has been proven down to the 10nm node.