FD-SOI ensures continuity with planar processes and design
FD-SOI technology is planar and makes use of same design rules as bulk planar technologies, like traditional CMOS, making the porting of an existing design to FD-SOI quick and simple.
The manufacturing process for FD-SOI is simpler than alternatives and makes extensive use of existing fab infrastructure and manufacturing processes, eliminating the need for expensive investments.
Continuing Moore’s law with FD-SOI
Moore's Law is not just about the technological ability to put more transistors on a chip. It also incorporates the economic feasibility of doing so. The adoption of complex technologies to continue scaling transistor geometry may break the current industry economies, making the products manufactured with those new technology nodes more expensive.
Despite a more expensive substrate, compared to bulk technologies, the simplicity of the FD-SOI manufacturing process makes FD-SOI devices more economical than alternatives, while offering better or a similar level of performance.