Extending Embedded Flash Technology
In a previous issue of Challenge we looked at ST's Flash+ technology and devices such as the M39432 that use Flash+ to combine large Flash and EEPROM memories on the same chip. This is an ideal solution in portable phones and other applications. The Flash memory is typically used for holding large programs that may need updating from time to time and the EEPROM is used to store parameters that need to be frequently updated at the byte level.
In these applications, the Flash/EEPROM combo chip is used as an external memory but there is also today a rapidly growing interest in microcontrollers with embedded Flash memory for program storage. ST, for example, has shipped several million 16-bit ST10 microcontrollers with up to 1Mb of embedded Flash memory and recently introduced several new members of its 8-bit ST7 family with embedded Flash.
With its latest addition to the 8/16-bit ST9 family, the ST92F120, ST is taking this concept even further by providing a unique emulated EEPROM (E3PROM) capability that removes the need for an external EEPROM memory. This means that designers will often be able to implement applications that require regular updates of single-byte parameters as single-chip solutions instead of the minimum two-chip solution required up until now.
SEPARATE FLASH and EEPROM CELLS?
Why not simply put separate Flash and EEPROM cells on the microcontroller ? The answer is that Flash and EEPROM technologies do not use compatible processes. In particular, the thickness of the thin insulating oxide layers is dramatically different - 11nm for Flash and 7nm for EEPROM so they cannot be formed in a single process step. On the other hand, growing the oxide layers sequentially introduces difficult manufacturing problems as the thermal treatment required to grow the second oxide layer will tend to modify the thickness of the first oxide.
In addition, the conventional EEPROM cell requires at least two additional masks compared to the basic Flash process: one for the differential tunnel oxide and one for a dedicated capacitor implant for the EEPROM tunnel region. This is because the capacitor implant used for high precision capacitors for the integrated A/D converter uses different dopant dose and energy. Consequently, it is cost-effective to make microcontrollers with embedded Flash or microcontrollers with embedded EEPROM but not microcontrollers with both Flash and EEPROM.
For applications where data does not need to be updated frequently, this is not a problem. However, where in situ reprogramming is required, designers have until now been faced with the choice of two imperfect solutions. The first is to add a small external EEPROM, thereby doubling the chip count and increasing the PCB area and assembly costs. The second is to simulate the EEPROM function in software, using part of the Flash memory as a 'virtual EEPROM'. The problem with this approach is that the simulation software not only takes up valuable processor time - which can significantly slow down real-time response - but also requires up to 20Kbytes of program code. For most single-chip microcontroller applications, this amount of program memory can only be made available by choosing a more expensive device, one with more program memory than the application would otherwise need.
AN ELEGANT SOLUTION FROM ST
The ST92F120 eliminates this problem by providing the microcontroller with 1Kbyte of on-chip emulated EEPROM. Like simulated EEPROM, this technique uses a small part of the on-chip Flash memory as 'virtual EEPROM' but, thanks to an elegant technique patented by ST, the function is implemented transparently as far as the user is concerned. Two small 4Kbyte sectors of the Flash memory are reserved to emulate a 1Kbyte EEPROM, with each sector divided into four 1Kbyte blocks, and the microcontroller also contains an embedded Program/Erase controller cell that manages the erase/write operations to these sectors.
Associated with each Flash sector is a hardware non-volatile pointer and these map the 'virtual EEPROM' to one of the Flash blocks. Initially, the EEPROM addresses are mapped to the first block of the first sector. Whenever one or more consecutive bytes in a 16-byte page needs to be rewritten, the whole of the modified page is written to the next free block and the pointers updated. At the same time, one block of the sector not currently being used is erased.
When the page to be rewritten is already in the fourth block of one sector, the 'EEPROM' is moved to the first block of the other sector, which will have been previously erased. This method gives a fast EEPROM write time of around 30ms and also ensures that the microcontroller can continue program execution during the EEPROM write cycle. Similarly, because the interrupt vector table is stored in Flash, a fast interrupt response is maintained.
The ST92F120 is the first of a family of single-chip microcontrollers from ST that will offer embedded Flash and Emulated EEPROM and provides another excellent illustration of ST's all-round strength in Flash technology.
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