Section
Author's Guide | Reviewer's Guide

ST Journal of Research
Processor Architecture and Compilation
for Embedded Systems

Vol. 1, No. 2, September 2004 - Art. 6
 
A Retargetable Register Allocation Framework for Embedded Processors

by
Jean-Marc Daveau, Thomas Thery, Thierry Lepley, Miguel Santana (STMicroelectronics)

Copyright
© ACM, 2004. This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for
redistribution. The definitive version will be published in the Proceedings of the LCTES 2004 Conference, pages 202 - 210, http://doi.acm.org/10.1145/997163.997192
 
Abstract
This paper describes the FlexCC2 register allocation framework. FlexCC2 is an optimizing retargetable C compiler for embedded processors, and in particular for DSP processors. Embedded processors
often contain features such as irregular and constrained register sets that complicate register allocation, making traditional methods inefficient. In this paper, we present a register allocation framework specifically tailored for embedded processor specificities. This framework has been integrated
in the FlexCC2 production compiler and is used by FlexCC2 customers.
 

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