Thanks to its low power consumption and non-volatility, the Flash technology has spearheaded the development of portable applications, and with the decrease in the cost per bit of Flash, complete storage solutions have started moving from hard-disk drive (HDD) to solid-state storage.

Flash memories come in two main flavors, NOR and NAND. The NOR Flash architecture offers fast read capabilities and is best used for code storage and direct execution in cell phones and other electronic devices. For high density data storage, NAND Flash‘s higher density and programming throughput make it the preferred choice.

ST in the Flash market
STMicroelectronics is a leading supplier of non-volatile memories, including NOR and NAND Flash. The Company is ranked third in NOR Flash and first in Serial Flash (NOR Flash with a serial bus) with a 16.3% and 31% market share, respectively. As a top-tier trusted supplier of world-class memory solutions, ST empowers its customers with leading-edge technologies and products in building efficient and secure applications for wireless and embedded systems.

The Company has achieved its leading position through major manufacturing capacity increases, world-class Flash technology, perfect coverage of key applications with a leading-edge, innovative and differentiated product portfolio, and long-term agreements with ten of the world's market leaders in key Flash-consuming application segments such as mobile communications, digital consumer, PCs, hard disk drives, automotive, and industrial. ST is well placed to respond to changing market conditions and continue to outgrow the market.

ST’s strategy for Flash memories
The pressures on Flash manufacturers are twofold: to increase performance (in terms of speed, density, and power consumption) and to decrease costs. ST uses complementary approaches to achieve these goals, both at the process level and at the product and system level.

Process performance increase
The first approach is the continuous scaling down of process geometries through technology nodes defined by the semiconductor industry's ITRS (International Technology Roadmap for Semiconductors) roadmap (0.25µm, 0.18µm, 0.13µm, 90nm, 65nm ...) and by process shrinks. At the vanguard of the non-volatile memory technology research and development, ST has always pursued ambitious goals: in NOR, the Company is already in volume production with the 65nm generation; in NAND, 60nm and 55nm devices are in volume production and the 48 nm generation is in the development phase. On top of that, ST is developing prototypes of innovative phase-change memories in 90nm technology.
Source : iSuppli, April ‘07
Source : Web-Feet, April ‘07

This approach is reinforced by the deployment of new memory structures such as Multi-bit Cell Flash. ST's strategy is to continue to increase Flash memory density over the next few years by expanding such cell structures.

System solutions
The second approach is the development of a product portfolio that enables all applications to optimally exploit the current volume-production technology. This involves the enhancement of state-of-the-art memory structures and architecture, such as multi-bit cell Flash, and advanced architecture memories for specific applications; high-performance assembly to provide System-on-Chip solutions by stacking in a small single package several memory chips (Multi-Chip Package) or memories with a processor (System-in-Package); and finally, producing the broadest possible range of industry-standard products.

Multi-Chip Packages (MCP) and System-in-Package
ST has developed memory subsystems that combine one or more Flash memories with a low-power RAM (Random Access Memory) and associated firmware in a single, very compact multi-chip package. These devices provide a perfect solution for third-generation mobile terminals featuring new applications, including fast Internet connectivity, voice mail, Bluetooth communication, and data storage, where small form-factor and low-power consumption are mandatory.

Package on Package
ST is at the forefront of the Package-on-Package (PoP) technology developments, the latest packaging innovation designed to vertically combine discrete logic with memory packages. Two packages rest on top of one another, with a standard interface to route signals between them. PoPs go one step further than MCPs for board space saving, layout complexity reduction, simplified system design, and lower pin count in order to meet the relentless demand for miniaturization in mobile applications.

Advanced Architecture Flash Memories
Advanced architecture Flash memories feature parallel interface, high memory density, fast programming or read access time, low-voltage operation, and enhanced security. This strategy requires close cooperation with the major OEMs driving the development of new markets. This is an area where ST has a considerable advantage over other Flash suppliers because it has strategic alliances with key players in the communications, consumer, computer and peripherals, and automotive segments.

To meet the requirements of the mobile phone market, ST has designed ultra-compact, energy-saving NOR-type advanced architecture Flash memory solutions with densities up to 512 Mbits (or 1Gbit in a stacked package) and enhanced features such as fast asynchronous and synchronous read modes and dual- or multi-bank architecture to improve software flexibility and processing throughput. ST is complementing this offer with NAND-type Flash memories with densities up to 4 Gbits for data storage.

ST NOR Flash memory offer

NOR Flash memories for embedded market
Market and technology leader in NOR Flash memories, ST offers a broad-range NOR Flash portfolio, from industry-standard Flash memories to Advanced Architecture memories, well adapted to requirements of different markets, including automotive, consumer and computer peripherals. ST’s NOR Flash memories feature parallel or serial interface to fit requirements of any embedded application.

NOR Flash Memories for Consumer Applications
Consumer applications such as set-top boxes (STB), DVDs, Digital TV, digital still cameras, and PDAs are supporting more and more complex application codes while handling faster streams of data (MPEG files for STBs, for example). ST’s optimized Flash memory architectures meet the consumer market demand for higher-density fast-read access and cost-optimized Flash memories for both data storage and code execution, as well as enhanced security functions.

NOR Flash Memories for Automotive Applications
ST offers an adapted product offer for the fast growing automotive market in line with the evolution of automotive customers’ requirements, which vary significantly from application to application.

ST’s Advanced Architecture Flash memories with 32-bit data bus and fast burst-read mode address the need in today’s car entertainment and information systems for high-performance, high-density Flash memories. ST’s focus in Automotive Grade products is on excellence in quality (advanced production test screening) and service (deliveries and support).

NOR Flash memories for BIOS (Basic Input Output System) Storage
ST has developed a range of advanced architecture NOR Flash memories to meet the specific needs of system and video BIOS storage in desktops, servers and laptops.

Serial NOR Flash memories for Code Storage
With their high data retention and low energy consumption, serial NOR Flash products are ideal for code storage and execution in applications that require high performance, power, and space saving. ST serial Flash memories are used in a wide range of segments from computer peripherals (Hard Disk Drive, graphic card, all-in-one printers, CD-ROM player) to automotive (car radio, GPS navigation systems), communications (LAN card and ADSL modem) and consumer products (MP3 player, voice recorder, DVD player).

Serial NOR Flash memories for Data and Parameter Storage
ST ‘s Flash memories for data and parameter storage deliver added-value for all applications requiring fast transfer of data and parameters, such as digital answering machines, DECT, corded phones, pagers, digital cameras, home video game systems, toys, portable scanners, fax machines, cellular phones, voice memo recorders, printers, PDA, MP3 players/recorders, GPS systems, measurement systems, data streaming.

NOR Flash memories for mobile terminals
The mobile phone market perfectly illustrates the phenomenal growth expected in the Flash market. Mobile phones are rapidly evolving from basic voice-only terminals to multimedia terminals supporting complex applications, real-time communication services and handling fast streams of multimedia data. Today’s multimedia phones require high-bandwidth Flash memories with densities of up to 1Gbit of Flash memory to store code, and up to 4 Gbits to store data. ST’s NOR Flash offering for mobile terminals meet the mutually exclusive requirements of maximizing performance and minimizing cost, power consumption, and package size by exploiting new memory architectures, such as multi-bit cell technology, which enables higher densities, making it suitable for data storage as well.

ST NAND Flash Memory offer

Compared with NOR Flash, NAND Flash memories feature higher storage densities (up to 8 Gbits), faster erase time, but slower random access time. Whereas not efficient for direct code execution, they are well suited for storing large amounts of data, in particular in digital consumer applications. NAND Flash is increasingly pervading embedded and wireless applications to store large parameter sets or multimedia files such as music and digital images.

The NAND Flash architecture perfectly fits the data format widely used by mass storage, thanks to small or large page memory organization. In addition, standard NAND Flash memories have a multiplexed data/address bus that reduces the device pin count and enables density upgrades within a single footprint.

Conclusion
Flash memories are the most dynamic driving force in the memory industry and provide flexible solutions for code, data, code-and-data, and code-and-parameter storage in a number of existing and emerging applications. With one of the broadest portfolios of Flash memories in the market, including industry-standard, secure Advanced Architecture memories and Flash Memory Subsystems, ST is a grade-one trusted supplier, able to meet the requirements of almost any embedded or wireless application.

May 2007

ADDITIONAL INFORMATION

History
Flash memories were invented in the 1980s and were positioned in the market as a trade-off between EPROMs (Erasable Programmable Read-Only Memory) and EEPROMs (Electrically Erasable Programmable Read-Only Memory). Like EEPROMs, Flash memories can be electrically erased; it is not necessary to erase the whole memory array to store new data in a part of it. Like EPROM, a Flash array has a 1-transistor-per-cell structure, enabling the building of a cost-effective, higher-density memory.

At first, Flash memories benefited from exponential growth in the PC market. In the beginning of the PC era, volatile memories such as DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory) were the most important types of memory, despite the disadvantage of their non-volatility. As design and process-technology advances increased the density and usability of Flash technology, its ability to store data without power and its high read performance fueled its adoption as a supplement to the existing SRAM and DRAM subsystems.

Thanks to its low consumption and non-volatility, Flash memory proved to be the most suitable non-volatile memory for the development of portable applications, thus facilitating the advent of the nomadic era. In a first stage, this involved a kind of Flash memory referred to as NOR Flash, with applications where code execution predominated. Later, with the emergence of an alternative type of Flash called NAND, and the decrease in the cost per bit of Flash, complete storage solutions have started moving from hard-disk drive (HDD) to solid-state storage, thus boosting the current development of mobile multimedia applications.

Technical Notes
Flash memory, EPROM and EEPROM devices all use the same basic floating gate mechanism to store data, but they use different techniques for reading and writing data. In each case, the basic memory cell consists of a single MOS transistor (MOSFET) with two gates: a control gate connected to the read/write control circuitry, and a floating gate located between the control gate and the channel of the MOSFET (the part of the MOSFET through which electrons flow between the so-called Source and Drain terminals).

In a standard MOSFET, a single Gate terminal controls the electrical resistance of the channel: electrical voltage applied to the gate controls how much current can flow between the Source and Drain. The MOSFETs used in non-volatile memories include a second gate that is completely surrounded by an insulating layer of silicon dioxide, i.e., it is electrically isolated from the rest of the circuitry. Because the floating gate is physically very close to the MOSFET channel, even a small electric charge has an easily detectable effect on the electrical behavior of the transistor. By applying appropriate signals to the control gate and measuring the change in transistor behavior, it is possible to determine whether there is an electrical charge on the floating gate. Because the floating gate is electrically isolated from the rest of the transistor, special techniques are required to move electrons to and from the floating gate.

One method is to fill the MOSFET channel with high-energy electrons by making a relatively high current pass between the drain and the source of the MOSFET. Some of these "hot" electrons have sufficient energy to cross the potential barrier between the channels and reach the floating gate. When the high current in the channel is removed, these electrons remain trapped in the floating gate. This is the method used to program the memory cells in EPROM and Flash memories. This technique, known as Channel Hot Electron (CHE) injection, can be used to load an electrical charge onto the floating gate, but does not provide a way to discharge it. EPROM technology achieves this by flooding the entire memory array with ultra-violet light; the high-energy light rays penetrate the chip structure and impart enough energy to the trapped electrons to allow them to escape from the floating gate. This is a simple and effective method of erasing and proof that over-erasure, i.e., continuing to expose the chip to UV light after all of the floating gates have been discharged, does not damage the chip.

The second method of moving a charge to a floating gate is the quantum mechanical effect known as tunneling: electrons are removed from the floating gate by applying a voltage that is large enough to cause electrons to 'tunnel' across the insulating oxide layer to the source between the MOSFET control gate and the source or the drain. The number of electrons that can tunnel across an insulating layer in a given time depends on the thickness of the layer and the value of the applied voltage. To meet realistic voltage levels and erase-time constraints, the insulating layer must be very thin, typically 7nm (70 Angstroms).

EEPROM memories use tunneling to charge and discharge the floating gate according to the polarity of the applied tunneling voltage. A Flash memory can therefore be considered to be a memory device that is programmed like an EPROM and erased like an EEPROM, although there is much more to Flash technology than simply grafting the EEPROM erase mechanism onto EPROM technology.

The most important difference between EPROM and the other two processes lies in the thickness of the oxide layer that separates the floating gate from the source. In an EPROM, this is typically 20-25nm, but this is far too thick to allow tunneling to take place at an acceptable rate with a practical voltage level. For Flash memory, tunnel oxide thicknesses of around 10nm are required, and the quality of this oxide layer has a dramatic effect on the performance and reliability of the device. This is one of the reasons why relatively few semiconductor manufacturers have mastered Flash technology and even fewer have been able to reliably combine Flash technology and mainstream CMOS processes to build products such as microcontrollers with embedded Flash memory.

Multi-bit Cell Technology
Traditionally, the floating gate mechanism has been used to store a single data bit read by comparing the MOSFET threshold voltage with a reference value. However, with more sophisticated read/write techniques, it is possible to distinguish between more than two floating gate charge states, thus allowing two or more bits to be stored on a single floating gate. This is an important breakthrough because storing two bits per cell doubles the memory capacity for a given cell size. ST is one of the few Flash memory suppliers capable of offering multi-bit cell architectures.

NAND versus NOR

Although all Flash memories use the same basic storage cell, there are a number of ways in which the cells can be interconnected within the overall memory array. The two most prominent architectures are known as NOR and NAND; these terms, derived from traditional combinatorial logic, indicate the topology of the array and the manner in which individual cells are accessed for reading and writing. Initially, there was a basic distinction between these two fundamentally different architectures, with NOR devices exhibiting inherently faster read times and NAND devices offering higher storage densities (because the NAND cell is about 40% smaller than the NOR cell). ST’s strategy for positioning the two architectures is based on memory density: NAND Flash memories are currently considered to be the most cost-effective solution for 1 Gbit and above. For densities below 1 Gbit, other parameters need to be taken into consideration, including the size of the companion RAM and the programming and read throughput, according to the application requirements.