STMicroelectronics has developed a new power MOSFET technology that cuts ON-resistance by a factor of three to four, depending on voltage, compared to traditional power MOFETs. The new technology is called MDmesh (Multiple Drain mesh) because it combines ST's patented MeshOverlay horizontal layout with a novel drain structure based on multiple vertical p-stripe drain. In addition to the outstandingly low ON-resistance, the new drain structure results in excellent dV/dt and avalanche characteristics, while the strip layout geometry gives a dynamic performance that is significantly better than that of similarly rated competitive products. The key to MDmesh's outstanding performance is a new drain structure in which the drain is implemented as an array of partitions, with vertical p-type drain strips aligned with the thin, horizontal n-type source strips that are the key feature of the MeshOverlay technology. This approach allows breakdown voltage to be more than doubled compared to conventional drain structures; for example, an MDmesh MOSFET designed to withstand 500V exhibits the same drain resistivity and thickness as that of a conventional 200V MOSFET, which means that an MDmesh MOSFET will have a much lower ON-resistance than conventional devices designed to withstand the same source-drain breakdown voltage.
Because MDmesh also includes the MeshOverlay process and a gate finger layout that provide a highly effective means of controlling internal gate resistance, the new technology also offers outstanding dynamic performance, significantly better than conventionally structured power MOSFETs. For example, gate charge is typically more than 40% lower than competitive devices, leading to faster turn-off and lower switching losses.
MDmesh devices also exhibit the other major MeshOverlay benefits, including a simplified manufacturing process with precision alignment required in only one dimension instead of two, and reduced corner effects, leading to better electrical breakdown characteristics. As a result, MDmesh devices exhibit unsurpassed dV/dt capability and avalanche ruggedness. Other benefits include a reduced thermal coefficient of resistance, typically 1.7 at 125oC, compared to >2 for conventional power MOSFETs.
The first devices built with the new technology are the STP12NM50 and the STD5NM50, currently being sampled to selected lead customers. These are 500V/0.35 max in TO-220 and 500V/0.8 W max in DPAK, respectively. The STP12NM50 device features a chip size that accupies only around 60% of the total area allowed by a TO-220 package but its typical ON-resistance of around 0.3 Ohm is better than that of a standard IRFP450 with a much larger die size requiring a TO-247 package.
These benefits make the STP12NM50 particularly attractive in applications such as medium power SMPS and portable welding equipment, where the lower resistance and faster switching can boost power supply efficiency by at least 2% while simultaneously allowing smaller and cheaper heatsinks to be used - up to 40% smaller for the same ambient and junction temperatures.
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