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STCCP27
Video de-serializer for SMIA camera module



STCCP27 is a low voltage (1.8V/2.8V), high speed, Compact Camera Port (CCP1.0) decoder with dual differential line receivers. The CCP1.0 decoder includes I2C control lines level shifter. This device expands multimedia processor capabilities adding a main SMIA Camera port, if it isn't already available, or a secondary SMIA Camera Port in Architecture, like Video Phone, where two cameras are needed. Using ST’s interface the designer could dedicate this serial connection to High-End Serial Camera for Pictures and leave to embedded port the video call purpose.

Compact Camera Port Decoder

The STCCP27TBR receiver converts the SubLVDS clock/data stream (up to 416Mbps throughput bandwidth) back into parallel 8 bits of CMOS/LVTTL.
The device recognizes the CCP 32 bit start - of -frame (SOF), end-of-frame (EOF), start-of-line (SOL) and end-of-line (EOL) sequences to generate the H-SYNC and V-SYNC signals.
In general, baseband/multimedia processors for mobile phones come with a parallel interface.
 
STCCP27
STCCP27

General application block schematic

Low Power Consumption

In order to minimize static current consumption, it is possible to shut down the device when the interface is not being used by a power-down (EN) pin that reduces the maximum current consumption to 10µA. This low current consumption in power down state is another feature that makes it ideal for portable applications like mobile phones and PDAs.

Two dedicated I2C lines are provided to translate the bidirectional controls between the camera and the processor. In detail, the 1.8V sensor control settings can be driven using the 2.8V I2C lines coming from the baseband processor without any external discrete components like 10kOhm (typically) pull-up resistors.

ESD Protection

All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity from transient excess voltages. The STCCP27 is characterized for operation over the commercial temperature range of -40°C to + 85°C.

Innovative Package µTFBGA25

The device packaging is especially designed with minimum dimensions to suit the space-constrained implementations in mobile phones.
It is packaged in an innovative µTFBGA25 package with a pitch of 500µm. The STCCP27TBR is now available in a 3mm x 3mm, 25 pin, µTFBGA lead-free package (RoHS Compliant – Restriction on Hazardous Substances). It will be shipped in standard 7” reels with 3000pcs per reel.
  STCCP27

STCCP27 Features

Sub-Low Voltage Differential Signaling (subLVDS) Inputs: VID = ±150mV;
VIC = 900mV;
High data rate: DR=208Mbps, Compliant with SMIA CCP1; DRMAX=416Mbps with fIN-MAX=416MHz;
Operating voltage and I/O reference voltage:
VDD=2.65V to 3.60V;
Bidirectional I2C level Shifter between VDD and
VL: VL=1.65V to 1.95V;
Low power consumption: IDD+IL=10µA (disabled);
Lead-free µTFBGA package.

Functionality Application Details

The device supports two different modes of functioning; formatted (ENABLED_SYNC) and unformatted (DISABLED_SYNC) transmission of data on the data lines based on the selection of the SYNC_SEL control pin by the Baseband processor. The two modes differ in the way the Baseband processor recognises the Image/Video byte positioning.
In the ENABLED_SYNC mode (SYNC_SEL = VL), the Horizontal Sync and Vertical Sync signals are extracted from the serial input data stream before transmitting the 8-bit video/pixel data on the parallel output, D1-D8 in STCCP27. Instead the extracted Horizontal and Vertical sync signals are then transmitted separately. This mode is meant for simpler baseband/multimedia image processors to make their image processing easier.

STCCP27
Application block diagram


In the DISABLED_SYNC mode (SYNC_SEL = Gnd), the timing signals (HSYNC and VSYNC) are not extracted from the input data stream, baseband processor recovers the timing information from the embedded sync words (SOF, EOF, SOL, EOL) in the 8-bit parallel data output.

Ordering Codes

P / N
Datarate
I/O signals
SMIA        LEVEL
Package
STCCP27TBR
208Mbps
2.65V - 3.6V
Class 0    CCP1
µTFBGA25
STSMIA832*
650Mbps
1.65V - 1.95V
Class 0,1,2  CCP1/2
*Under Development