The STLVDS385 device is a transmitter that converts 24 bits of video data into four LVDS channels to drive a flat-panel display. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. The use of LVDS signaling reduces the size and cost of the cable connecting
to a display.
The device supports input clock rates of 20 to 85MHz. During each cycle of the transmit clock, 28 bits of input data, 8 bits each of R, G and B data and four control and timing bits, are sampled and transmitted.
At a transmit clock frequency of 85MHz, each LVDS channel transmits this data to the flat panel display at 595Mbit/s.
This is equivalent to a total throughput for the four channels of 297.5Mbyte/s.
The part supports flat panel displays with VGA, SVGA, XGA resolutions and single/dual-pixel SXGA resolutions.
The transmitter can be programmed to work with a rising or falling-edge strobe signal, using a dedicated pin. It also offers on-chip input-jitter filtering and high noise rejection. A power-down mode reduces power dissipation.
Applications
LCD flat panel display for notebooks and desktop monitors;