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STLVDS385 Interface
85MHz TTL TO LVDS SERIALIZER
SUITABLE FOR FLAT PANEL DISPLAYS

 

STLVDS385 Product Page


The STLVDS385 device is a transmitter that converts 24 bits of video data into four LVDS channels to drive a flat-panel display. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. The use of LVDS signaling reduces the size and cost of the cable connecting
to a display.

The device supports input clock rates of 20 to 85MHz. During each cycle of the transmit clock, 28 bits of input data, 8 bits each of R, G and B data and four control and timing bits, are sampled and transmitted.
At a transmit clock frequency of 85MHz, each LVDS channel transmits this data to the flat panel display at 595Mbit/s.
This is equivalent to a total throughput for the four channels of 297.5Mbyte/s.

STLVDS385

The part supports flat panel displays with VGA, SVGA, XGA resolutions and single/dual-pixel SXGA resolutions.

The transmitter can be programmed to work with a rising or falling-edge strobe signal, using a dedicated pin. It also offers on-chip input-jitter filtering and high noise rejection. A power-down mode reduces power dissipation.


Applications
LCD flat panel display for notebooks and desktop monitors;

Plasma display panels;

Digital TVs


Order Codes

P/N
Temp. range
Package
-40°C to +85° C
TSSOP56 (reel)


Features

Supply voltage from 3 to 3.6V;

Clock frequency from 20 to 85MHz;

Up to 297.5 Megabytes/second total data throughput;

Supports VGA, SVGA, XGA and Single/Dual Pixel SXGA;

High input-jitter filtering;

High noise rejection;

Compatible with TIA/EIA-644 LVDS Standard;

Typical 345mV of LVDS output swing for low EMI;

Available in TSSOP56 package.



ST8004