The contribution to the final R
DS(on) value, for 20V to 40V devices, is normally in the range from 10% to 15% maximum. Thus the impact on the total R
DS(on) reduction due to the lower resistivity substrates seems to be negligible, but we have to consider that for these devices a reduction of fractions of milliohms has a big impact on the total R
DS(on) value. This substrate has already been qualified due to its utilization in combination with the
STripFET III technology.
| Internal MOSFET structure |
|
|
|
Low Substrate Resistivity |
The wafer thickness contribution to the final R
DS(on) value is also in the range from 10% to 20%. Now the impact is not only on the R
DS(on) itself, but also on the thermal resistance R
THj-c.
Measured values allow a maximum value of 0.46 °C/Ohm to be guaranteed. Together the reduced die thickness and a silicon area of 29 mm
2 yield an excellent thermal behaviour.