STEVAL-MKI004V1
MEMS 3-axis - 2g/6g digital output low voltage linear accelerometer evaluation board based on LIS3LV02DQ
Data Brief
Features
Graphical user interface USB connector Control switches MEMS sensor LED indicators ST7-USB microcontroller
Description
The STEVAL-MKI004V1 is an evaluation kit designed to provide the user with a complete, ready-to-use platform for evaluation of the LIS3LV02DQ, a low power 3-axis linear accelerometer with digital output. The device includes a sensing element and an IC interface capable of translating information from the sensing element into a measured signal that can be used for external applications. In addition to the MEMS sensor, the evaluation board utilizes an ST7-USB microcontroller which functions as a bridge between the sensor and the PC, on which it is possible to use the graphical user interface (GUI) included with the kit or dedicated software routines for customized applications.
STEVAL-MKI004V1
October 2007
Rev 1
1/4
www.st.com 4
For further information contact your local STMicroelectronics sales office.
STEVAL-MKI004V1
D1 R1 180R
J1 1 V+ 2 DM 3 DP 4 GND VCC Vddf C1 10u + C5 100n C4 C2 100n 4u7 + R2 100R USB_B
R3 100R D3 D4 R5 100R R G
Vddf
nRsel ET i ccES
i ccdata i cccl k
dat a_re dy a
oscout osci n
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
U2 ST7265X_TQFP64 Gled 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 Rled
R6 1K5 Rled Gled
Vddf
C8 47n 220n 10u
C9
+ C10
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 UV ss UD M UD P UV cc UV dd Vddf Vssf PE5 PE6 PE7 PB0 PB1 PB2 PB3 PB4 PB5
OSCOU T OSCI N V ss2 V ssa V dda V dd2 I CCD AT A I CCCL K U SBEN A I N1 A I N0 SD A SCL RES T E V pp/I CCSEL PWM 1
17 18 19 20 cs_pad 21 22 23 da a_re dy 24 t a 25 26 V ddf 27 mi so 28 mosi 29 sck 30 31 32
PB6 PB7 PA 0 PA 1 PA 2 PA 3 PA 4 PA 5 PA 6 PA 7 SS M I SO M OSI SCK V dd1 V ss1
PWM 0 AI N6 AI N5 AI N4 AI N3 AI N2 OCM P2 OCM P1 PD3 PD2 PD1 PD0 PC7 PC6 PC5 PC4
osci n Yoscm1 Cosc1 33p CS1 CS2 12MH z
oscout
Cosc2 33p
VCC
Board schematic
C3 4u7 R7 10K R8 10K
+
C6 100n
sck mi so mosi da a_re dy t a cs_pad
J2 1 3 5 7 9 VCC
CS2 CS1
Scheme
2 4 6 8 10 I CP TP1 SW2 SW3
7 6 5 4 3 2 1
iccdata icccl k nRESET iccsel
Riccsel 10K
SW1 NReset
sck cs_pad
mddf V i so mosi
8 9 10 11 12 13 14
NC SD O SD A/ SDI / SDO V dd_I O SCL/ SPC CS NC
1 2 3 4 5 6 7
NC NC NC NC NC NC NC
28 27 26 25 24 23 22
U1 LI S3LV02DQ
NC GND Vdd Reserve d GND RDY/ I NT NC
NC Reserve d Vdd Reserve d GND CK NC
21 20 Vddf 19 18 17 16 15
C7 100n
J3 SPI
Board schematic
Figure 1.
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1
STEVAL-MKI004V1
Revision history
2
Revision history
Table 1.
Date 16-Oct-2007
Document revision history
Revision 1 Initial release Changes
3/4
STEVAL-MKI004V1
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