STi7111
Low-cost HDTV satellite set-top box decoder for Microsoft VC-1, H.264 and MPEG-2
Data Brief
Features
Microsoft VC-1, MPEG-2 and H.264 support ST40-300 CPU running at 450 MHz, high performance for Linux, Windows CE and OS21 based systems DVB-S2 and DVB-S front-end integrated demodulators with a fully featured HD advanced decoder system-on-chip (SoC) Flexible ST231 based advanced video decoder ST231 audio decoder at 450 MHz supporting WMA9, AC3, DD+, AAC, AAC+ with SPDIF output HD and SD simultaneous display, 2 video, 3 graphics planes and background color with high quality filtering HDMI/HCDP output plus HD or standard definition (SD) component and composite output Unified DDR2 32-bit interface operating at up to 400MHz
(2 channels) Digital PCMout S/PDIF Audio Analog Stereo Video out DAC YPrPb HDMI CEC
Programmable transport interface (PTI) and transport stream (TS) merger with up to 2 digital external TS inputs, 2 internal inputs from internal demodulators and one TS from memory for network client USB 2.0 to support network interface and feature enhancement External memory interface (EMI) with Nand-Flash, Nor-Flash, PCI, peripherals support 10/100 Mbit/s Ethernet MAC with media independent interface (MII) and reduced MII (RMII) Advanced security, SVP compliant, WM DRM compliant Dual smartcard, 4 x UART, 3 x synchronous serial controllers (SSC), soft modem and DAA interface, IR blaster and receiver, UHF Rx digital input DiSEqC 2.0 and FSK modem supported 4 x 4 matrix key front panel switch scanner FSM with key de-bounce 27 x 27mm package, 65nm technology
PCI NOR/NAND FLASH DDR-2 SDRAM
SDTV
HD DACs HDMI Video output
SD DACs DENC
Memory Padlogic Padlogic ClockGen/ Service (JTAG, ICE..) EMI/PCI LMI
JTAG
IRQs
Audio decoder ST231
Audio IF
VDP main (DEI-HD + IQI)
Compositor GDPx3 cursor alpha
VDP aux
resets clocks
STBus system interconnect SAT FE core SWTS DVB-S2+DVB-S demodulator CPU Transport/SEC CPU DMA CPU FDMA ST40-4/300 (x2) PTI PDES3 MailBoxes (x2) int I2C PHY Peripheral Ethernet USB 2.0 Host GMAC Video Video decoder H.264/VC-1 HD ST231 Blitter display
COMMS
TSmerger
FE0 FE1 DiSEqC 1/FSK DiSEqC 0 TSin 2 x serial or 1 x parallel
SSCs, PWM MII/RMII USB-bus PIOs, UARTs MAFE, SC...
December 2007
Rev 1
1 /4
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For further information contact your local STMicroelectronics sales office.
Description
STi7111
1
Description
The STi7111 is an HD set-top box / full back-end processor for satellite set-top boxes, compliant with ATSC, SMPTE VC-1, DVB-S2, DIRECTV, DCII and ARIB BS4 specifications. It provides very high performance for low-cost HD systems. With enhanced performance compared to the STi7109, it includes both VC-1 and H.264 video decoders for new, low bitrate applications. The main platform target for the STi7111 is the DVB-S2 zapper. Optionally the device can be used in a client box through IP over Ethernet, Multimedia over Coax Alliance (MoCA) or WiFi.
Figure 1.
STi7111 applications
1 x 128 MB DDR2-400 MHz 16 1 x 128 MB DDR2-400 MHz 16 32 IR Rx UHF Rx 27/30MHz FE0 - DVB-S2 27/30MHz Key scanning (no front panel micro-ctrl) PIOs
STb6110
Discrete and power circuitry
DiSEqC0 STi7111
L R S/PDIF plug
27/30MHz FE1 - DVB-S1 STb6110 Discrete and DiSEqC1 Ethernet power circuitry MII Plug Ethernet PHY Coax plug MoCA PHY USB 2.0 DAA Si3062
Analog YPbPr
Buffer filter HDMI TMDS 1.48GHz CEC / DDC CVBS/YC Buffer filter I2C EMI/PCI EEPROM VCR
USB 2.0 host plug PSTN V92 SW modem
ST8024 Smart card socket interface
NOR/NAND flash
WiFi
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STi7111
Revision history
2
Revision history
Table 1.
Da te 19-Dec-2007
Document revision history
Revision 1 Initial release. Changes
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STi7111
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