EMIF04-VID01F2
4 LINES LOW CAPACITANCE EMI FILTER AND ESD PROTECTION
IPADTM
MAIN APPLICATION Where EMI filtering in ESD sensitive equipment is required:
LCD and camera for mobile phones Computers and printers Communication systems MCU board
DESCRIPTION The EMIF04-VID01F2 is a 4 lines highly integrated array designed to suppress EMI / RFI noise in all systems subjected to electromagnetic interferences. The EMIF04-VID01F2 Flip-Chip packaging means the package size is equal to the die size. Additionally, this filter includes an ESD protection circuitry which prevents the protected device from destruction when subjected to ESD surges up to 15 kV. BENEFITS High efficiency EMI filtering (-40db @ 900MHz) Low line capacitance suitable for high speed data bus Low serial resistance for camera impedance adaptation Lead free package Optimized PCB space consuming: 1.92mm x 1.29mm Very thin package: 0.65 mm High efficiency in ESD suppression on inputs pins (IEC61000-4-2 level 4) High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging Reduce compnents counts and BOM COMPLIES WITH THE FOLLOWING STANDARDS: IEC61000-4-2 Level 4 on input pins 15kV (air discharge) 8kV (contact discharge) MIL STD 883E - Method 3015-6 Class 3
F l i p - Ch i p (10 Bumps) Table 1: Order Code Part Number EMIF04-VID01F2
Marking GU
Figure 1: Pin Configuration (ball side)
6 5 4 3 2 1
I4 Gnd O4
I3
I2 Gnd O2
I1
A B
O3
O1
C
Figure 2: Configuration
R
Input
Output
R = 100 CLINE = 16pF typ. @ 3V
TM: IPAD is a trademark of STMicroelectronics.
February 2005
REV. 1
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Table 2: Absolute Ratings (limiting values) Symbol Tj Top Tstg Parameter and test conditions Maximum junction temperature Operating temperature range Storage temperature range Value 125 - 40 to + 85 - 55 to + 150 Un i t C C C
Table 3: Electrical Characteristics (Tamb = 25C) Symbol VBR IR M V RM R Parameter Breakdown voltage Leakage current @ VRM
VBR VRM IR IRM IRM IR VRM VBR I
V
Stand-off voltage Series resistance between Input & Output Input capacitance per line
Cl i n e
Symbol VBR IRM R Cl i n e IR = 1mA
Test conditions
Min. 6
Typ. 8
Max. 10 500
Unit V nA pF
VRM = 3V per line I = 10mA VR = 3V DC 1MHz VOSC = 30mV 80 100 16
120 19
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Figure 3: S21 (dB) attenuation measurement
0 dB - 10
Figure 4: Analog crosstalk measurement
0 dB - 10 - 20 - 30
- 20
- 40
- 30
- 50 - 60
- 40
- 70 - 80
- 50
- 90
- 60 100k 1M 10M f/Hz 100M 1G
- 100 100k 1M 10M f/Hz 100M 1G
Figure 5: ESD response to IEC61000-4-2 (+15kV air discharge) on one input V(in) and on one output (Vout)
Figure 6: ESD response to IEC61000-4-2 (-15kV air discharge) on one input V(in) and on one output (Vout)
Input 10V/d
Input 10V/d
Output 10V/d
Output 10V/d
200ns/d
200ns/d
Figure 7: Junction capacitance versus reverse voltage applied (typical values)
CLINE(pF)
28 26 24 22 20 18 16 14 12 10 0.0 0.5 1.0 1.5 2.0 2.5 3.0
VLINE(V)
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Figure 8: Ordering Information Scheme
EMIF
EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F2 = Leadfree Flip-Chip x = 1: 500m, Bump = 315m = 2: Leadfree Pitch = 500m, Bump = 315m
yy
-
xxx zz
Fx
Figure 9: FLIP-CHIP Package Mechanical Data
315m 50 500m 50 250m 50
435m 50
650m 65
50
1
m
5
1.92mm 50m
Figure 10: Foot Print Recommendations
Figure 11: Marking
Dot, ST logo xx = marking z = packaging location yww = date code (y = year ww = week)
1.29mm 50m
0
365
240
365
Copper pad Diameter : 250m recommended , 300m max
E
Solder stencil opening : 330m
Solder mask opening recommendation : 340m min for 300m copper pad diameter
xxz yww
40
220
All dimensions in m
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Figure 12: FLIP-CHIP Tape and Reel Specification
Dot identifying Pin A1 location 4 +/- 0.1
Ø 1.5 +/- 0.1
1.75 +/- 0.1 3.5 +/- 0.1
0.73 +/- 0.05
All dimensions in mm
Table 4: Ordering Information Ordering code EMIF04-VID01F2 Marking GU Package Flip-Chip Weight 3.6 mg Base qty 5000 Delivery mode Tape & reel 7"
Note: More packing informations are available in the application note AN1235: "Flip-Chip: Package description and recommendations for use" AN1751: "EMI Filters: Recommendations and measurements"
Table 5: Revision History Date 15-Feb-2005 Revision 1 First issue. Description of Changes
8 +/- 0.3
ST E
ST E
ST E
xxx yww
User direction of unreeling
xxx yww
xxx yww
4 +/- 0.1
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
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