SMA661AS
Fully integrated GPS LNA IC
Features
Power down function Integrated matching networks Low noise figure 1.15 dB @ 1.575 GHz High gain 18 dB @ 1.575 GHz High linearity (IIP3 = +3dBm) Temperature compensated Unconditionally stable ESD protection (HBM 2kV) 70 GHz Silicon Germanium Technology
SOT666 (1.65 x 1.2 x 0.57 mm)
Applications
GPS The SMA661AS, using the ST's leading-edge 70GHz SiGe BiCMOS technology, achieves excellent RF performance at the GPS frequency of 1.575GHz, in terms of power gain, noise Figure and linearity with a current consumption of 8.5mA. The device is unconditionally stable and ESD protected. All these features are steady over the operating temperature range of -40 oC to +85 oC. It's housed in ultra-miniature SOT666 plastic package.
Description
The SMA661AS is the first low-noise amplifier with integrated matching networks and embedded power-down function. The chip, which requires only one external input capacitor, drastically reduces the application bill of materials and the PCB area, resulting in an ideal solution for compact and cost-effective GPS LNA.
Table 1.
Device summary
Marking 661 Package SOT666 Packing Tape and reel
Part Number SMA661ASTR
April 2007
Rev 4
1/14
www.st.com 14
Contents
SMA661AS
Contents
1 2 Pins description and circuit schematic . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 2.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 4 5
Typical performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Evaluation board description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package and packing informations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.1 5.2 Package informations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Packing informations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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SMA661AS
Pins description and circuit schematic
1
Pins description and circuit schematic
Table 2. Pins description
Pin No. 1 2 3 4 5 6 Pin Name RF IN GND PD RF OUT GND VCC
Figure 1.
Pin connection
1 Top View 2 3
6 5 4
Figure 2.
Application circuit schematic
V C C (6 )
R F in p u t
C1
R F IN (1 ) PD (3 )
R F O U T (4 )
S M A661AS
GND (2 , 5 )
R F O u tp u t
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Electrical specifications
SMA661AS
2
2.1
Electrical specifications
Absolute maximum ratings
Table 3.
Symbol Vcc Tstg Ta VESD VESD
Absolute maximum ratings
Parameter Supply voltage Storage temperature Operating ambient temperature Electrostatic Discharge Electrostatic Discharge HBM (ALL PINs) MM (ALL PINs) Conditions Value 3.3 -60 to +150 -40 to +85
2000 200
Unit V
o o
C C
V V
2.2
Electrical characteristics
(Ta = +25 C, VCC = 2.7 V, ZL = ZS = 50 ohm, unless otherwise specified; measured according to Figure 13 at pin level) Table 4.
Symbol f Vcc Icc IPD Gp NF IIP2 IIP3 ISL RLin RLout VPDL(1) VPDH(2) Stability
1. The device is switched to OFF state 2. The device is switched to ON state
Electrical characteristics
Parameters Frequency Supply voltage Current Consumption Power Down Mode Current Consumption Power gain Noise figure Input IP2 Input IP3 Reverse Isolation Input Return Loss Output Return Loss Power Down Low State Power Down High State 100 - 10000 MHz 1.0 Unconditionally stable f = 1500-1650 MHz f = 1500-1650 MHz f1 = 849 MHz, f2 = 2424 MHz, Pin = -30 dBm f1 = 1574.5 MHz, f2 = 1575.5 MHz, Pin = -30 dBm VPD VPDL 2.4 Test Conditions Min. Typ. 1575 2.7 8.5 10 18 1.15 0.5 3 -28 10 10 0.5 3 Max. Unit MHz V mA nA dB dB dBm dBm dB dB dB V V
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SMA661AS
Typical performance
3
Typical performance
(Vcc = 2.7 V, ZL = ZS = 50 ohm, unless otherwise specified; measured according to Figure 13 at pin level) Figure 3. Power Gain vs. Frequency Figure 4. Input Return Loss vs. Frequency
22 21 20 19 18 Gp (dB) 17 16 15 14 13 12 11 10 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 f (MHz)
IRL (dB)
0
Ta = -40 C
Ta = +25 C
-2 -4 -6 Ta = -40 C Ta = +25 C
Ta = +85 C
-8 -10 -12 -14 -16 -18 Ta = +85 C
-20 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 f (MHz)
Figure 5.
Noise Figure vs. Frequency
Figure 6.
Reverse Isolation vs. Frequency
3.0
-20 -22
2.5
-24 -26 ISL (dB) -28 -30 -32 -34
Ta = +25 C
Ta = -40 C
2.0 NF (dB) Ta = +85 C
Ta = +85 C
1.5
1.0
Ta = +25 C Ta = -40 C
0.5
-36 -38
0.0 1500
1520
1540 f (MHz)
1560
1580
1600
-40 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 f (MHz)
Figure 7.
Output Return Loss vs. Frequency
Figure 8.
IIP3 vs. Temperature
0 -2 -4 -6 ORL (dB)
5 4.5 4 3.5 IIP3 (dBm)
Ta = +25 C Ta = +85 C
-8 -10
3 2.5 2 1.5 1 0.5 0 -40 25 T (C) 85
Ta = -40 C -12 -14 -16 -18 -20 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 f (MHz)
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Typical performance
SMA661AS
Figure 9.
Current Consumption vs. Temperature
Figure 10. Gain Power Down vs. Temperature
8.5 8.4 8.3 8.2
-15 -16 -17 -18 Gpd (dB) -19 -20 -21 -22 -23 -24 -25
-40 25 T (C) +85
8.1 Ic c (mA) 8 7.9 7.8 7.7 7.6 7.5
-40
25 T (C)
+ 85
Figure 11. Power Down Current vs. Temperature
60
50
40 Ipd (nA)
30
20
10
0 -40 -15 10 T (C) 35 60 85
Note:
S-Parameter are available on request.
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SMA661AS Figure 12. Stability
5
Typical performance
4.5
4
3.5
3
K
2.5
2
1.5
1
0.5
0 0 -K 1 2 3 4 5 f (GHz) 6 7 8 9 10
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Evaluation board description
SMA661AS
4
Evaluation board description
Figure 13. Evaluation board
C2 47p J1 RF I N 3 3n F C5 4 7p C3 U1 RFin GND PD S MA661 Vcc GND R Fout
C1 1uF 1 2
Vcc JP1
1 2 3
6 5 4 J2 RF OUT
SM A661AS
VP down C6 1 uF
Table 5.
Component C1 C2 C3 C5 C6 J1 J2 U1 Substrate
Evaluation board bill of material
Value 1F (electrolytic) 47 pF 33 nF 47 pF 1 F (electrolytic) Type Case_A 0603 0603 0603 Case_A 142-0711-841 (SMA_Female) 142-0711-841 (SMA_Female) SOT666 FR4 18mm x 20mm x 1.1mm Manufacturer Various Murata (GRM188) Murata (GRM188) Murata (GRM188) Various Johnson Johnson STMicroelectronics Various Function Supply Filter RF Bypass Input dc block / IIP3 improvement RF Bypass Supply Filter RF Input connector RF Output connector SMA661AS GPS LNA Layer = 3 (see Figure 14 & 15)
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SMA661AS Figure 14. Evaluation Board Layout
Evaluation board description
20 mm
18 mm
Figure 15. Evaluation Board Cross Section
Note:
Gerber files of the SMA661AS evaluation board are available on request.
Layout recommendation:
Both lines from pin 2 and pin 5 to GND plane have to be as short as possible to maximize the performances. Therefore a via hole under the IC is highly recommended.
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Package and packing informations
SMA661AS
5
5.1
Package and packing informations
Package informations
In order to meet environmental requirements, ST offers this device in ECOPACK package. This package has a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Table 6. SOT666 (Lead-free) mechanical data
mm. DIM. MIN. A A3 b b1 D E E1 e L1 L2 L3 0.45 0.08 0.17 0.27 1.50 1.50 1.10 0.50 0.19 0.10 0.10 0.30 TYP MAX. 0.60 018 0.27 0.34 1.70 1.70 1.30
Figure 16. SOT666 (Lead-Free) package outline
b1 0.10
M
A
L1
L3 b
A
A3
D
A
E1 L2
E
e
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SMA661AS Figure 17. Recommended footprint
0.50
Package and packing informations
0.62
2.60
0.99
0.30
5.2
Packing informations
Figure 18. Reel description
TAPE SLOT INTO CORE FOR TAPE START
ACCESS HOLE AT SLOT LOCATION
W1 measured at hub
C A N
D
e1 W2 measured at hub
W3 measured at outer edge
mm Min Typ Max
A 175 180 185
C 12.8 13 13.2
D 20.2
e1 1.5
N 59.5 60 60.5
W1 8.4 8.4 10
W2
W3 7.9 9.4
14.4
10.9
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Package and packing informations Figure 19. Carrier tape requirements
SMA661AS
K T Do
Po P2 E
F Bo Bo W
Ko
Ao
P
D1
USER DIRECTION OF FEED
Min Ao Bo Do D1 E F Ko Po P P2 T W 1.73 1.73 1.5 1 1.65 3.45 0.64 3.9 3.9 1.95 0.18 7.9
Typ 1.78 1.78 1.5 1.75 3.5 0.69 4 4 2 0.2 8
Max 1.83 1.83 1.6 1.85 3.65 0.73 4.1 4.1 2.05 0.21 8.3
Figure 20. Device orientation
Sprocket holes on the right
Sprocket holes on the left
Sprocket hole
Cavity
661
661
661
661
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SMA661AS
Revision history
6
Revision history
Table 7.
Date 15-Jul-2005 20-Oct-2005 07-Jul-2006 04-Apr-2007
Document revision history
Revision 1 2 3 4 Initial release. Added: Evaluation Board Schematic & Layout. Changed to new template. Added packing informations. Updated noise figure and high gain values. Updated Figure 3 and Figure 5. Changes
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SMA661AS
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