EMIF06-AUD01F2
6-line EMI filter and ESD protection for audio interface
Features
4-line EMI filter and ESD protection for internal and external (headset) microphone 2-line EMI filter and ESD protection for headset speaker
Benefits
EMI (I/O) low-pass filter High efficiency EMI filter Very low PCB space consumption: 4.6 mm2 Very thin package: 0.65 mm High efficiency in ESD suppression High reliability offered by monolithic integration High reduction of parasitic elements through integration and wafer level packaging
Flip chip package, 20 bumps
Description
The EMIF06-AUD01F2 is a highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference. The flip chip packaging means the package size is equal to the die size. This filter includes ESD protection circuitry, which prevents damage to the application when it is subjected to ESD surges up to 15 kV. Figure 1. Pin configuration
1 2
MIC2N
Complies with following standards
IEC 61000-4-2 level 4 external pins 15 kV (air discharge) 8 kV (contact discharge) IEC 61000-4-2 level 1 internal pins 2 kV (air discharge) 2 kV (contact discharge)
Appl ication s
3
MIC2P
4
SPK_R
5
SPK_L
ESD protection and EMI/RFI filtering for the audio bottom connector interface, where EMI filtering in ESD sensitive equipment is required:
A B C D
MIC1P
Mobile phones and communication systems Wireless modules
MIC1N
BIAS1
GND Int
HOOK
GND
GND
MIC1P int
MIC2N int
BIAS2
SPK_L int
MIC1N int
BIAS3
MIC2P int
SPK_R int
PHG
Silicon side
February 2008
Rev 1
1/14
www.st.com
Characteristics
EMIF06-AUD01F2
1
Figure 2.
Characteristics
Circuit schematic
R1 R2 R3
HOOK BIAS2 MIC2_P-int
C1 C2
MIC2_P-ext MIC2_N-ext GND-ext MIC1_P-ext MIC1_N-ext
R4
MIC2_N-int GND-int
R6 R7
C3 C4
BIAS1 MIC1_P-int MIC1_N-int BIAS3
R8 R9
SPK_R-ext
R10
SPK_R-int
R12
C5
PHG (Phantom Ground)
R13
SPK_L-ext
R11
SPK_L-int
C6
GND-ext
C1 to C4 = 1.3 nF typical
Table 1.
Symbol
Absolute ratings (limiting values)
Parameter IEC61000-4-2 air discharge on external lines IEC61000-4-2 contact discharge on external lines IEC61000-4-2 air discharge on internal lines IEC61000-4-2 contact discharge on internal lines Continuous power dissipation per channel SPK_L, SPK_R Continuous current per channel SPK_L, SPK_R Total continuous power dissipation Operating temperature range Storage temperature range Junction temperature Tamb = 85 C Tamb = 85 C Tamb = 85 C -40 -40 Test conditions Min Max 15 15 2 2 180 135 285 +85 +125 +125 Unit
Vpp PSPK ISPK Ptotal Top Tstg Tj
kV
mW mA mW C C C
Table 2.
Symbol VBR IRM VRM VCL Rd IPP Cline
Electrical characteristics - definitions (Tamb = 25 C)
Parameters Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Input capacitance per line
IPP VCL VBR VRM IR IRM IRM IR VRM VBR VCL V I IPP
2/14
EMIF06-AUD01F2 Table 3.
Symbol VBR IRM C1-C4(1) C5-C6(1) R1(2) R2(2)
Characteristics
Electrical characteristics - values (Tamb = -40 C to + 85 C unless otherwise specified)
Parameter Diode reverse breakdown voltage Leakage current through clamping diodes Capacitance on MIC lines Channel Capacitance SPK_L, SPK_R Hook Pull up resistance External Microphone Pull up resistance Test conditions IR = 1 mA Tamb = 25 C VR = 3 V DC per line Tamb = 25 C V = 0 V, F = 1 MHz, VOSC = 30 mV Tamb = 25 C 1.3 60 47 2.2 100 1 10 15 Vdc = 0 - 2.4 V, F = 20 Hz - 20 kHz, Rgen = 600 , Vout = 1.5 VPP Rload = 200 k, Tamb = 25 C Balanced (or differential mode)
(4)
Min 14.0
Typ
Max
Unit V
0.5
A nF pF k k k k
R3,R4, R7, R8(2) Microphone Serial Resistance R6, R9(2) R10, R11(3) R12, R13(2) Internal Microphone Pull up and Pull down resistance SPK Serial Resistance SPK PHG Resistance
MICx channel THD
Distor tion
-75
d B(A)
1. Capacitor tolerance 30% 2. Resistor tolerances 10% 3. Resistor tolerances 20% 4. See Figure 20 and Figure 21
3/14
Characteristics
EMIF06-AUD01F2
1.1
RF filtering
The low signal level on the analog inputs and the pulsed transmitter in the phone are a combination that requires efficient RF-filtering. RF-rectification must be avoided. Therefore, the stop band attenuation is optimized for the frequency bands 800-2480 MHz. Table 4. Stop band performance 800 - 2480 MHz
Attenuation Channel MIC1_x to MIC1_x-int MIC2_x to MIC2_x-int MIC1_P to BIAS1 MIC2_P to BIAS2 SPK_x to SPK_x-int Test conditions Min Rsource = 50 , Rload = 1 k Rsource = 50 , Rload = 1 k Rsource = 50 , Rload = 1 k Rsource = 50 , Rload = 1 k Rsource = 50 , Rload = 1 k 25 25 25 25 25 Typ Max Unit dB dB dB dB dB
Table 5.
Stop band performance 10 - 800 MHz
Attenuation Test conditions Min Typ Max Unit dB dB dB dB Rsource = 50 , Rload = 1 k Rsource = 50 , Rload = 1 k Rsource = 50 , Rload = 1 k Rsource = 50 , Rload = 1 k 20 20 20 20
Channel MIC1_x to MIC1_x-int MIC2_x to MIC2_x-int MIC1_P to BIAS1 MIC2_P to BIAS2
1.2
Figure 3.
Attenuation characteristics
S21 attenuation measurement MIC1_P and MIC1_N lines (50 / 50 ) Figure 4. S21 attenuation measurement MIC1_P and MIC1_N lines (50 / 1 K simulation)
0.00 dB - 10.00
0 dB - 10
- 20.00
- 20
- 30.00
- 30
- 40.00
- 40
- 50.00
- 50
F/Hz
- 60.00 100.0k MIC1_P line 1.0M 10.0M MIC1_N line 100.0M 1.0G
F/Hz
- 60
Rsource = 50 / Rload = 50
100k
1M
MIC1_P line
10M
MIC1_N line
Rsource = 50 / Rload = 1 K
100M
1G
4/14
EMIF06-AUD01F2
Characteristics
Figure 5.
S21 attenuation measurement MIC2_P and MIC2_N lines (50 / 50 )
Figure 6.
S21 attenuation measurement MIC2_P and MIC2_N lines (50 / 1 K simulation)
0.00 dB - 10.00
0 dB - 10
- 20.00
- 20
- 30.00
- 30
- 40.00
- 40
- 50.00
- 50
F/Hz
- 60.00 100.0k MIC2_P line 1.0M 10.0M MIC2_N line 100.0M 1.0G
- 60 100k
MIC2_P line
F/Hz
1M
MIC2_N line
10M
100M
1G
Rsource = 50 / Rload = 50
Rsource = 50 / Rload = 1 K
Figure 7.
S21 attenuation measurement SPK_L and SPK_R lines (50 / 50 )
Figure 8.
S21 attenuation measurement SPK_L and SPK_R lines (50 / 1 K simulation)
0.00 dB - 10.00
0.00 dB - 10.00
- 20.00
- 20.00
- 30.00
- 30.00
- 40.00
- 40.00
- 50.00
- 50.00
F/Hz
- 60.00 300.0k 1.0M 3.0M 10.0M 30.0M f/Hz 100.0M 300.0M SPK_L line 1.0G 3.0G
- 60.00 300.0k 1.0M SPK_R line 3.0M Sim 10.0M
F/Hz
30.0M f/Hz 100.0M 300.0M Sim 1.0G 3.0G
SPK_R line
SPK_L line
Figure 9.
S21 attenuation measurement MIC1_P and BIAS1 lines (50 / 50 )
Figure 10. S21 attenuation measurement MIC1_P and BIAS1 lines (50 / 1 K simulation)
0.00 dB - 10.00
0.00 dB - 10.00
- 20.00
- 20.00
- 30.00
- 30.00
- 40.00
- 40.00
- 50.00
- 50.00
- 60.00
- 60.00
F/Hz
- 70.00 100.0k 1.0M Mic1P/BIAS1 50 10.0M 100.0M 1.0G
- 70.00 100.0k 1.0M Mic1P/BIAS1 1k 10.0M
F/Hz
100.0M 1.0G
Rsource = 50 / Rload = 50
Rsource = 50 / Rload = 1 k
5/14
Characteristics Figure 11. S21 attenuation measurement MIC2_P and BIAS2 lines (50 / 50 )
0.00 dB - 10.00
EMIF06-AUD01F2 Figure 12. S21 attenuation measurement MIC2_P and BIAS2 lines (50 / 1 K simulation)
0.00 dB - 10.00
- 20.00
- 20.00
- 30.00
- 30.00
- 40.00
- 40.00
- 50.00
- 50.00
F/Hz
- 60.00 100.0k 1.0M Mic2P/BIAS2 50 10.0M 100.0M 1.0G
F/Hz
- 60.00 100.0k 1.0M Mic2P/BIAS2 1k 10.0M 100.0M 1.0G
Rsource = 50 / Rload = 50
Rsource = 50 / Rload = 1 k
1.3
ESD characteristics
Figure 14. ESD response to IEC 61000-4-2 (-15 kV air discharge) on input Vin and output Vout Mic1 line
vi = 20 V/d
Figure 13. ESD response to IEC 61000-4-2 (+15 kV air discharge) on input Vin and output Vout Mic1 line
vi = 20 V/d
vo = 5 V/d 100 ns/d
vo = 5 V/d 100 ns/d
Figure 15. ESD response to IEC 61000-4-2 (+15 kV air discharge) on input Vin and output Vout Mic2 line
Figure 16. ESD response to IEC 61000-4-2 (-15 kV air discharge) on input Vin and output Vout Mic2 line
vi = 20 V/d
vi = 20 V/d
vo = 5 V/d 100 ns/d
vo = 5 V/d 100 ns/d
6/14
EMIF06-AUD01F2
Characteristics
1.4
Filter characteristics
Figure 18. Analog crosstalk SPK_R and MIC2_N lines (50 / 50 )
0.00 dB - 10.00 - 20.00 - 30.00 - 40.00 - 50.00 - 60.00 - 70.00 - 80.00 - 90.00
Figure 17. Analog crosstalk MIC2_P and MIC1_N lines (50 / 50 )
0.00 dB - 10.00 - 20.00 - 30.00 - 40.00 - 50.00 - 60.00 - 70.00 - 80.00 - 90.00
F/Hz
- 100.00 100.0k 1.0M 10.0M 100.0M 1.0G - 100.00 100.0k SPK_R/MIC2_N 1.0M 10.0M MIC2_N/MIC1_P
F/Hz
100.0M 1.0G
1.5
Total harmonic distortion characteristics
Variation of total harmonic distortion and noise in microphone lines versus frequency, balanced (or differential) mode, VBIAS = 0 V
-80.449
Figure 19. Total harmonic distortion and noise Figure 20. with only cables and environmental circuit versus frequency, VBIAS = 0 V
0 THD+N (dB) -108.517 0 THD+N (dB)
-50
VGEN: 1.5 Vp-p 20 Hz < F < 20 kHz RGEN: 600 RLOAD: 200 k A-Weighting filter Bandwidth: 40 kHz TAMB = 25 C
-50
VGEN: 1.5 Vp-p VMAX = 0 V 20 Hz < F < 20 kHz RGEN: 600 RLOAD: 200 k A-Weighting filter Bandwidth: 40 kHz TAMB = 25 C
-100 F (Hz) 100 1k 5.3357 k 10 k
-100 F (Hz) 100 1k 3.4951 k 10 k
7/14
Characteristics
EMIF06-AUD01F2
Figure 22. Figure 21. Variation of total harmonic distortion and noise in microphone lines versus frequency, balanced (or differential) mode, VBIAS = 2.4 V
0 THD+N (dB) -76.593 0 THD+N (dB)
Variation of total harmonic distortion and noise in microphone lines versus frequency, unbalanced (or single-ended) mode
-61.510 -65.688
-50
VGEN: 1.5 Vp-p VMAX = 2.4 V 20 Hz < F < 20 kHz RGEN: 600 RLOAD: 200 k A-Weighting filter Bandwidth: 40 kHz TAMB = 25 C
-50
VGEN: 1.5 Vp-p 20 Hz < F < 20 kHz RGEN: 600 RLOAD: 100 k A-Weighting filter Bandwidth: 40 kHz TAMB = 25 C
-100 F (Hz) 100 1k 5.3357 k 10 k
-100 F (Hz) 100 1k 3.9933 k 10 k
Figure 23. Test setup for measurement of distortion on MIC channels
UPV Rohde & Schwarz audio analyzer
XLR connectors
MIC1N
MIC1Nint
EMIF06-AUD01F2
MIC1P
MIC1Pint
Figure 24. Internal UPV setup schematic
300
MIC1N
1.5 V PP 120 pF
MIC1Nint
120 pF
To balanced Input amplifier
100 k k
EMIF06-AUD01F2
1.5 V PP
120 pF
120 pF
100 k k To balanced Input amplifier
MIC1P
300
MIC1Pint
8/14
EMIF06-AUD01F2
Application schematics
2
Application schematics
Figure 25. Basic configuration scheme
R1 R2 R3
HOOK BIAS2 MIC2_P-int
C1
MIC2_P MIC2_N GND
R4
MIC2_N-int
C2
GND-int
R6
BIAS1
C3 C4
MIC1_P MIC1_N
R7
MIC1_P-int MIC1_N-int BIAS3
R8 R9
SPK_R
R10 C5
SPK_R-int
R12
+
PHG (Phantom Ground)
R13
SPK_L
R11 C6
SPK_L-int
+
GND
Figure 26. Stereo line in
R1 R2 R3
HOOK BIAS2 MIC2_P-int
C1
MIC2_P MIC2_N
MIC2_N-int GND-int
R4
C2
GND
R6
BIAS1
C3 C4
MIC1_P MIC1_N
R7
MIC1_P-int MIC1_N-int BIAS3
R8 R9
SPK_R
R10 C5
SPK_R-int
R12
+
PHG (Phantom Ground)
R13
SPK_L
R11 C6
SPK_L-int
+
GND
9/14
Application schematics Figure 27. Stereo microphone / line in
EMIF06-AUD01F2
R1 R2 R3
HOOK BIAS2 MIC2_P-int
C1
MIC2_P MIC2_N
MIC2_N-int GND-int
R4
C2
GND
R6
BIAS1
C3 C4
MIC1_P MIC1_N
R7
MIC1_P-int MIC1_N-int BIAS3
R8 R9
SPK_R
R10 C5
SPK_R-int
R12
+
PHG (Phantom Ground)
R13
SPK_L
R11 C6
SPK_L-int
+
GND
Figure 28. External balanced microphone / stereo line in
R1 R2 R3
HOOK BIAS2 MIC2_P-int
C1
MIC2_P MIC2_N
MIC2_N-int GND-int
R4
C2
GND
R6
BIAS1
C3 C4
MIC1_P MIC1_N
R7
MIC1_P-int MIC1_N-int BIAS3
R8 R9
SPK_R
R10 C5
SPK_R-int
R12
+
PHG (Phantom Ground)
R13
SPK_L
R11 C6
SPK_L-int
+
GND
10/14
EMIF06-AUD01F2
Ordering information scheme
3
Ordering information scheme
Figure 29. Ordering information scheme
EMIF
EMI Filter Number of lines Information 3 letters = application 2 digits = version Package F = Flip-Chip x = 2: Lead free, pitch = 500 m, bump = 315 m
yy
-
xxx zz
Fx
4
Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 30. Flip chip dimensions
500 m 50 315 m 50 650 m 65
500 m 50
2.42 mm 50 m
1.92 mm 50 m
11/14
Package information
EMIF06-AUD01F2
Figure 31. Marking
Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week)
Figure 32. Footprint recommendation
Copper pad Diameter: 250m recommended, 300 m max
E
xxz y ww
Solder stencil opening: 330 m
Solder mask opening recommendation: 340 m min for 315 m copper pad diameter
Figure 33. Flip chip tape and reel specification
Dot identifying Pin A1 location 2.0 0.05 4.0 0.1 Ø 1.55 0.05
1.75 0.1 3.5 - 0.05
2.10
0.73 0.05 All dimensions in mm
8 0.3
STE
STE
STE
xxz yww
User direction of unreeling
xxz yww
xxz yww
4 0.1
2.56
Note:
More packing information is available in the application notes: AN1235: "Flip chip: Package description and recommendations for use" AN1751: "EMI Filters: Recommendations and measurements"
12/14
EMIF06-AUD01F2
Ordering information
5
Ordering information
Table 6. Ordering information
Marking HP Package Flip chip Weight 6.45 mg Base qty 5000 Delivery mode 7" Tape and reel
Ordering code EMIF06-AUD01F2
6
Revision history
Table 7.
Date 18-Feb-2008
Document revision history
Revision 1 First issue Changes
13/14
EMIF06-AUD01F2
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