TS922
Rail-to-rail high output current dual operational amplifier
Features
Rail-to-rail input and output Low noise: 9nV/Hz Low distortion High output current: 80mA (able to drive 32 loads) High-speed: 4MHz, 1V/s Operating from 2.7V to 12V Low input offset voltage: 900V max (TS922A) ESD internal protection: 2kV Latch-up immunity Macromodel included in this specification Dual version available in flip-chip package D SO-8 (Plastic micropackage) N DIP8 (Plastic package) J (Flip-chip)
Applications
Headphone amplifier Sound cards, multimedia systems Line driver, actuator driver Servo amplifier Mobile phone and portable equipment Instrumentation with low noise as key factor Piezoelectric speaker driver The device is stable for capacitive loads up to 500pF. P TSSOP 8 (Thin shrink small outline package)
Description
The TS922 is a rail-to-rail dual BiCMOS operational amplifier optimized and fully specified for 3V and 5V operation. The device's high output current allows low-load impedances to be driven. Ver y low noise, low distortion, low offset and a high output current capability make this device an excellent choice for high quality, low voltage or battery operated audio systems.
November 2007
Rev 7
1/22
www.st.com 22
Contents
TS922
Contents
1 2 3 4 Pin diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1 4.2 4.3 Impor tant note concerning this macromodel . . . . . . . . . . . . . . . . . . . . . . 12 Electrical characteristics from macromodelization . . . . . . . . . . . . . . . . . . 12 Macromodel code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1 5.2 5.3 5.4 Flip-chip package (8 bumps) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 DIP8 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 SO-8 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 TSSOP8 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6 7
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
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TS922
Pin diagrams
1
Pin diagrams
Figure 1. Pin connections (top view)
Output 1 Inverting Input 1 Non-inverting Input 1 VC C
1 2 3 4
+ +
8 V C+ C 7 Output 2 6 Inverting Input 2 5 Non-inverting Input 2
Figure 2.
Pinout for flip-chip package (top view)
OUT2
-IN2
+IN2
+
VCC+ GND
+
OUT1 -IN1 +IN1
3/22
Absolute maximum ratings and operating conditions
TS922
2
Absolute maximum ratings and operating conditions
Table 1.
Symbol VCC Vid Vin Tstg Supply voltage (1) Differential input voltage Input voltage
(3) (2)
Absolute maximum ratings (AMR)
Parameter Value 14 1 VDD-0.3 to VCC+0.3 -65 to +150
(4)
Unit V V V C
Storage temperature Thermal resistance junction to ambient SO-8 TSSOP8 DIP8 Flip-chip Thermal resistance junction to case(4) SO-8 TSSOP8 DIP8 Maximum junction temperature HBM: human body MM: machine model(6) CDM: charged device model(7) Output short circuit duration Latch-up immunity Soldering temperature (10sec), leaded version Soldering temperature (10sec), unleaded version model(5)
Rthja
125 120 85 90 40 37 41 150 2000 100 1500 see note(8) 200 250 260
C/W
Rthjc
C/W
Tj ESD
C V
mA C
1. All voltage values, except differential voltage are with respect to network ground terminal. 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. If Vid > 1V, the maximum input current must not exceed 1mA. In this case (Vid > 1V), an input series resistor must be added to limit input current. 3. Do not exceed 14V. 4. Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous shortcircuits on all amplifiers. These values are typical. 5. Human body model: A 100pF capacitor is charged to the specified voltage, then discharged through a 1.5k resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 6. Machine model: A 200pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5). This is done for all couples of connected pin combinations while the other pins are floating. 7. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins. 8. There is no short-circuit protection inside the device: short-circuits from the output to VCC can cause excessive heating. The maximum output current is approximately 80mA, independent of the magnitude of VCC. Destructive dissipation can result from simultaneous short-circuits on all amplifiers.
4/22
TS922 Table 2.
Symbol VCC Vicm Toper Supply voltage
Absolute maximum ratings and operating conditions Operating conditions
Parameter Value 2.7 to 12 VDD -0.2 to VCC +0.2 -40 to +125 Unit V V C
Common mode input voltage range Operating free air temperature range
5/22
Electrical characteristics
TS922
3
Table 3.
Symbol
Electrical characteristics
Electrical characteristics measured at VCC = +3V, VDD = 0V, Vicm = VCC/2, Tamb = 25C, and RL connected to VCC/2 (unless otherwise specified)
Parameter Test conditions TS922 TS922A TS922IJ (flip-chip) Vio Input offset voltage Tmin Tamb Tmax TS922 TS922A TS922IJ (flip-chip) 2 Vout = VCC/2 Tmin Tamb Tmax Vout = VCC/2 Tmin Tamb Tmax RL= 10k Tmin Tamb Tmax VOH High level output voltage RL = 600 Tmin Tamb Tmax RL = 32 RL= 10k Tmin Tamb Tmax VOL Low level output voltage RL = 600 Tmin Tamb Tmax RL = 32 RL= 10k, Vout = 2Vp-p Tmin Tamb Tmax Avd Large signal voltage gain RL = 600, Vout = 2Vp-p Tmin Tamb Tmax RL = 32, Vout = 2Vp-p ICC GBP CMR SVR Io SR Total supply current Gain bandwidth product Common mode rejection ratio Supply voltage rejection ratio Output short circuit current Slew rate No load, Vout = VCC/2 Tmin Tamb Tmax RL = 600 Tmin Tamb Tmax VCC = 2.7 to 3.3V Tmin Tamb Tmax 60 56 60 60 50 0.7 70 35 15 16 2 4 80 85 80 1.3 3 3.2 mA MHz dB dB mA V/s V/mV 180 200 2.90 2.90 2.87 2.87 2.63 50 50 100 100 1 15 30 30 100 100 Min. Typ. Max. 3 0.9 1.5 mV 5 1.8 2.5 V/C nA nA V V V mV mV mV Unit
DVio Iio Iib
Input offset voltage drift Input offset current Input bias current
6/22
TS922 Table 3.
Symbol m Gm en THD Cs
Electrical characteristics Electrical characteristics measured at VCC = +3V, VDD = 0V, Vicm = VCC/2, Tamb = 25C, and RL connected to VCC/2 (unless otherwise specified) (continued)
Parameter Phase margin at unit gain Gain margin Test conditions RL = 600, CL =100pF RL = 600, CL =100pF Min. Typ. 68 12 9 0.005 120 Max. Unit Degrees dB
nV ----------Hz
Equivalent input noise voltage f = 1kHz Total harmonic distortion Channel separation Vout= 2Vp-p, f= 1kHz, Av= 1, RL=600
% dB
7/22
Electrical characteristics Table 4.
Symbol
TS922
Electrical characteristics measured at VCC = 5V, VDD = 0V, Vicm = VCC/2, Tamb = 25C, and RL connected to VCC/2 (unless otherwise specified)
Parameter Conditions TS922 TS922A TS922IJ (flip-chip) Min. Typ. Ma x . 3 0.9 1.5 mV 5 1.8 2.5 2 Vout = VCC/2 Tmin Tamb Tmax Vout = VCC/2 Tmin Tamb Tmax RL= 10k Tmin Tamb Tmax 4.9 4.9 4.85 4.85 4.4 50 50 120 120 300 200 70 35 20 16 2 4 60 56 60 60 50 0.7 80 85 80 1.3 3 3.2 mA MHz dB dB mA V/s V/mV mV V 1 15 30 30 100 100 V/C nA nA Unit
Vio
Input offset voltage
Tmin Tamb Tmax TS922 TS922A TS922IJ (flip-chip)
DVio Iio Iib
Input offset voltage drift Input offset current Input bias current
VOH
High level output voltage
RL = 600 Tmin Tamb Tmax RL = 32 RL= 10k Tmin Tamb Tmax
VOL
Low level output voltage
RL = 600 Tmin Tamb Tmax RL = 32 RL= 10k, Vout = 2Vp-p Tmin Tamb Tmax
Avd
Large signal voltage gain
RL = 600, Vout = 2Vp-p Tmin Tamb Tmax RL = 32, Vout = 2Vp-p
Icc GBP CMR SVR Io SR
Total supply current Gain bandwidth product Common mode rejection ratio Supply voltage rejection ratio Output short circuit current Slew rate
No load, Vout = VCC/2 Tmin Tamb Tmax RL = 600 Tmin Tamb Tmax VCC = 4.5 to 5.5V Tmin Tamb Tmax
8/22
TS922 Table 4.
Symbol m Gm en THD Cs
Electrical characteristics Electrical characteristics measured at VCC = 5V, VDD = 0V, Vicm = VCC/2, Tamb = 25C, and RL connected to VCC/2 (unless otherwise specified) (continued)
Parameter Phase margin at unit gain Gain margin Equivalent input noise voltage Total harmonic distortion Channel separation Conditions RL = 600, CL =100pF RL = 600, CL =100pF f = 1kHz Vout= 2Vp-p, f= 1kHz, Av= 1, RL=600 Min. Typ. 68 12 9 0.005 120 Ma x . Unit Degrees dB
nV ----------Hz
% dB
9/22
Electrical characteristics
TS922
Figure 3.
Output short circuit current vs. output voltage
Figure 4.
Total supply current vs. supply voltage
100 80 O u t p u t S h o r t - C i r c u i t C u r r e n t ( m A) 60 40 20 0 -2 0 -4 0 -6 0 -8 0 -1 0 0 0 0 ,5 1 1 ,5 O u t p u t Voltage (V) 2 2 ,5 3
S in k
V c c = 0 /3 V
S o u rc e
Figure 5.
60
Voltage gain and phase vs. frequency
180
Figure 6.
Equivalent input noise voltage vs. frequency
phase
30
Equivalent Input Noise ( nV/sqrt ( Hz )
40
120
25
g a in
G a in ( d B )
R l= 1 0 k C l= 1 0 0 p F
Ph a s e (D e g )
20
VCC=1.5V RL=100
20
60
15
10
0
0
5
0 0.01
-2 0 1E+02 1E+03 1E+04 1E+05 F r e q u e n c y (Hz) 1E+06 1E+07 -6 0 1E+08
0.1
1 Frequency (kHz)
10
100
Figure 7.
THD + noise vs. frequency
Figure 8.
0.04
THD + noise vs. frequency
0.02
0.032
0.015 THD+Noise ( %)
THD+Noise ( %)
0.024
0.01
RL=2k Vo=10Vpp VCC=6V Av= 1
RL=32 Vo=4Vpp VCC=2.5V Av= 1
0.016
0.005
0.008
0 0.01 0.1 1 Frequency (kHz) 10 100
0 0.01 0.1 1 Frequency (kHz) 10 100
10/22
TS922
Electrical characteristics
Figure 9.
0.7
THD + noise vs. frequency
Figure 10. THD + noise vs. output voltage
1 0 ,0 0 0
0.6
1 ,0 0 0
0.5
THD+Noise ( %)
0.4
0.3 0.2
RL=32 Vo=2Vpp VCC=1.5V Av= 10
T H D + N o i s e ( %)
0 ,1 0 0
RL=600 f=1kHz VCC=0/3V Av= -1
0 ,0 1 0
0.1 0 0.01 0.1 1 Frequency (kHz) 10 100
0 ,0 0 1 0 0 ,2 0 ,4 0 ,6 Vo u t (V r m s ) 0 ,8 1 1 ,2
Figure 11. THD + noise vs. output voltage
Figure 12. THD + noise vs. output voltage
10
10
1
THD+Noise ( %)
RL=32 f=1kHz VCC=1.5V Av= -1
0.1
THD+Nois e (%)
1
0.1
RL=2k f=1kHz VCC=1.5V Av= -1
0.01
0.01 0 0.2 0.4 Vout (Vrms) 0.6 0.8 1
0.001 0 0.2 0.4 0.6 Vout (Vrms) 0.8 1 1.2
Figure 13. Open loop gain and phase vs. frequency
50 180
40
120 Phase ( Deg) 60 0 1E+2 1E+3 1E+4 1E+5 Frequency (Hz) 1E+6 1E+7 1E+8 G ain ( dB) 30
20
CL=500pF
10
0
11/22
Macromodel
TS922
4
4.1
Macromodel
Important note concerning this macromodel
Please consider the following remarks before using this macromodel.
All models are a trade-off between accuracy and complexity (i.e. simulation time). Macromodels are not a substitute to breadboarding; rather, they confirm the validity of a design approach and help to select surrounding component values. A macromodel emulates the nominal performance of a typical device within specified operating conditions (temperature, supply voltage, for example). Thus the macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the main parameters of the product.
Data derived from macromodels used outside of the specified conditions (VCC, temperature, for example) or even worse, outside of the device operating conditions (VCC, Vicm, for example), is not reliable in any way. Section 4.2 provides the electrical characteristics resulting from the use of this macromodel.
4.2
Electrical characteristics from macromodelization
Table 5. Electrical characteristics resulting from macromodel simulation at VCC = 3V, VDD = 0V, RL, CL connected to VCC/2, Tamb = 25C (unless otherwise specified)
Conditions Value 0 RL = 10k No load, per operator 200 1.2 -0.2 to 3.2 RL = 10k RL = 10k VO = 3V VO = 0V RL = 600k , RL = 10k CL = 100pF RL = 600k 2.95 25 80 80 4 1.3 68 Unit mV V/mV mA V V mV mA mA MHz V/s Degrees
Symbol Vio Avd ICC Vicm VOH VOL Isink Isource GBP SR m
12/22
TS922
Macromodel
4.3
Macromodel code
** Standard Linear Ics Macromodels, 1996. ** CONNECTIONS: * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY * .SUBCKT TS92X 1 2 3 4 5 * .MODEL MDTH D IS=1E-8 KF=2.664234E-16 CJO=10F * * INPUT STAGE CIP 2 5 1.0 0 00E-12 CIN 1 5 1.0 0 00E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 8.125000E+00 RIN 15 16 8.125000E+00 RIS 11 15 2.238465E+02 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 153.5u VOFN 13 14 DC 0 IPOL 13 5 3.20 0 0E-05 CPS 11 15 1e-9 DINN 17 13 MDTH 400E-12 VIN 17 5 -0.10 0 0e+00 DINR 15 18 MDTH 400E-12 VIP 4 18 0.40 0 0E+00 FCP 4 5 VOFP 1.865000E+02 FCN 5 4 VOFN 1.865000E+02 FIBP 2 5 VOFP 6.250000E-03 FIBN 5 1 VOFN 6.250000E-03 * GM1 STAGE * * ** * ** * * FGM1P 119 5 VOFP 1.1 FGM1N 119 5 VOFN 1.1 RAP 119 4 2.6E+06 RAN 119 5 2.6E+06 * GM2 STAGE * * ** * ** * * G2P 19 5 119 5 1.92E-02 G2N 19 5 119 4 1.92E-02 R2P 19 4 1E+07 R2N 19 5 1E+07 * * ** * ** * ** * ** * ** VINT1 500 0 5 GCONVP 500 501 119 4 19.38 VP 501 0 0 GCONVN 500 502 119 5 19.38 VN 502 0 0
13/22
Macromodel * * ***** orientation isink isource VINT2 503 0 5 FCOPY 503 504 VOUT 1 DCOPYP 504 505 MDTH 400E-9 VCOPYP 505 0 0 DCOPYN 506 504 MDTH 400E-9 VCOPYN 0 506 0 * * ** * ** * ** * ** * *** F2PP 19 5 poly(2) VCOPYP VP 0 0 0 0 F2PN 19 5 poly(2) VCOPYP VN 0 0 0 0 F2NP 19 5 poly(2) VCOPYN VP 0 0 0 0 F2NN 19 5 poly(2) VCOPYN VN 0 0 0 0 * COMPENSATION * * ** * *** CC 19 119 25p * OUTPUT * * ** * ** DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 6.250000E+02 VIPM 28 4 5.0 0 00E+01 HONM 21 27 VOUT 6.250000E+02 VINM 5 27 5.0 0 00E+01 VOUT 3 23 0 ROUT 23 19 6 COUT 3 5 1.30 0 0E-10 DOP 19 25 MDTH 400E-12 VOP 4 25 1.052 DON 24 19 MDTH 400E-12 VON 24 5 1.052 .ENDS;TS92X * * ***
TS922
0.5 0.5 1.75 1.75
14/22
TS922
Package information
5
Package information
In order to meet environmental requirements, STMicroelectronics offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics trademark. ECOPACK specifications are available at: www.st.com.
5.1
Flip-chip package (8 bumps)
Figure 14. Top view and dimensions of 8-bump flip-chip
1600 m
1600 m 500m
Die size: 1600m x 1600m 30m Die height: 350m 20m Die height (including bumps): 600m Bumps diameter: 315m 50m Bumps height: 250m 40m Pitch: 500m 10m
500m
315m
600 m
Figure 15. Flip-chip footprint recommendation
TS922IJ Footprint
500m =250m 500m 75m min. 100m max. Track
Solder mask opening
500m
500m
=400m
150m min.
Pad in Cu 18m with Flash NiAu (6m, 0.15m)
15/22
Package information Figure 16. Flip-chip marking (top view)
BUMP 1A CORNER
TS922
Logo: ST Part number: 922 Date code: YWW The dot indicates the bump 1A corner
E
LEADFREE
922 YWW
Figure 17. Tape and reel specification (top view)
1
1
A
A
User direction of feed
Note:
Device orientation: the devices are oriented in the carrier pocket with bump number A1 adjacent to the sprocket holes.
16/22
TS922
Package information
5.2
DIP8 package
Figure 18. DIP8 package mechanical drawing
Table 6.
DIP8 package mechanical data
Dimensions
Ref. Min. A A1 A2 b b2 c D E E1 e eA eB L 2.92 0.38 2.92 0.36 1.14 0.20 9.02 7.62 6.10
Millimeters Typ. Max. 5.33 0.015 3.30 0.46 1.52 0.25 9.27 7.87 6.35 2.54 7.62 10.92 3.30 3.81 0.115 4.95 0.56 1.78 0.36 10.16 8.26 7.11 0.115 0.014 0.045 0.008 0.355 0.300 0.240 Min.
Inches Typ. Max. 0.210
0.130 0.018 0.060 0.010 0.365 0.310 0.250 0.100 0.300
0.195 0.022 0.070 0.014 0.400 0.325 0.280
0.430 0.130 0.150
17/22
Package information
TS922
5.3
SO-8 package
Figure 19. SO-8 package mechanical drawing
Table 7.
SO-8 package mechanical data
Dimensions
Ref. Min. A A1 A2 b c D H E1 e h L k ccc 0.25 0.40 1 0.10 1.25 0.28 0.17 4.80 5.80 3.80
Millimeters Typ. Max. 1.75 0.25 0.004 0.049 0.48 0.23 4.90 6.00 3.90 1.27 0.50 1.27 8 0.10 0.010 0.016 1 5.00 6.20 4.00 0.011 0.007 0.189 0.228 0.150 Min.
Inches Typ. Max. 0.069 0.010
0.019 0.010 0.193 0.236 0.154 0.050 0.020 0.050 8 0.004 0.197 0.244 0.157
18/22
TS922
Package information
5.4
TSSOP8 package
Figure 20. TSSOP8 package mechanical drawing
Table 8.
TSSOP8 package mechanical data
Dimensions
Ref. Min. A A1 A2 b c D E E1 e K L L1 0 0.45 0.05 0.80 0.19 0.09 2.90 6.20 4.30
Millimeters Typ. Max. 1.2 0.15 1.00 1.05 0.30 0.20 3.00 6.40 4.40 0.65 8 0.60 1 0.75 0 0.018 3.10 6.60 4.50 0.002 0.031 0.007 0.004 0.114 0.244 0.169 Min.
Inches Typ. Max. 0.047 0.006 0.039 0.041 0.012 0.008 0.118 0.252 0.173 0.0256 8 0.024 0.039 0.030 0.122 0.260 0.177
19/22
Ordering information
TS922
6
Ordering information
Table 9. Order codes
Temperature range Package Packaging Marking TS922IN DIP8 TS922AIN TS922ID TS922IDT SO-8 TS922AID TS922AIDT TS922IYD TS922IYDT(1) TS922AIYD TS922AIYDT(1) TS922IPT TSSOP8 TS922AIPT TS922IYPT(2) TS922AIYPT(2) TS922IJT/EIJT TSSOP8 (Automotive grade) Flip-chip Tape & reel 922AY Tape & reel 922 Tape & reel 922AI 922IY Tube TS922AIN 922I Tube or Tape & reel 922AI 922IY -40C, +125C SO-8 (Automotive grade) Tube or Tape & reel 922AIY 922I
Part number TS922IN
1. Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent. 2. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent are on-going.
20/22
TS922
Revision history
7
Revision history
Table 10.
Date 1-Feb-2001 1-Jul-2004 2-May-2005 1-Aug-2005 1-Mar-2006
Document revision history
Revision 1 2 3 4 5 First release. Flip-chip package inserted in the document. Modifications in AMR Table 1 on page 4 (explanation of Vid and Vi limits, ESD MM and CDM values added, Rthja added). PPAP references inserted in the datasheet, see Table 6 on page 20. TS922EIJT part number inserted in the datasheet, see Table 6 on page 20. Modifications in AMR Table 1 on page 4 (Rthjc added), parameter limits on full temperature range added in Table 3 on page 6 and Table 4 on page 8. Added notes on ESD in AMR table. Re-formatted package information. Added notes for automotive grade in order codes table. Changes
26-Jan-2007
6
12-Nov-2007
7
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TS922
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