STA260
Sirius SDARS channel, service & source decoder-
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STA260 is a fully integrated 3rd generation Baseband signal processor for Sirius Satellite Digital Audio Radio Service (SDARS). It is implemented using ST Micro's advanced 90 μm CMOS090 technology.
It allows a highly efficient implementation of a Sirius "SDARS Satellite Digital Audio Radio Service" receiver when used with its companion STA210 tuner ASIC.
STA260 is packaged in a Low profile Fine pitch Ball Grid Array (LFBGA 15x15) and in Very thin Fine pitch Ball Grid Array (VFBGA 8x8).
Key Features
- 2 Satellite and 1 terrestrial signal demodulators and decoders
- Advanced DSP processor to implement PAC audio decoder
- Requires a single 17MHz clock reference; all high-speed clock signals are derived using on-chip PLL
- Programmable I2S to support 32K/48K/44.1K audio sample rate (32K/48K Sample rates use internal clocks, 44.1K Sample rate uses external clock)
- I2C master interface to control tuner and audio DAC
- External control through UART interface using Sirius Standard Protocol (SSP) over RS-232
Analog to digital converters Three internal 10 BIT A/D converters for 76.5MHZ if signals conversion - Low power technology
1.2V, 90 μm technology 2.5V capable I/OS
Design Resources
TopTechnical Documentation
Product Specifications
| Description | Version | Size |
|---|---|---|
|
DB0431: Sirius SDARS channel, service and source decoder
|
1.1 | 153 KB |
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