The STM32H743/753 lines offer the performance of the Cortex-M7 core (with double-precision floating point unit) running up to 400 MHz while reaching 2 times better dynamic power consumption (Run mode) versus the STM32F7 lines.
At 400 MHz fCPU, the STM32H743/753 lines deliver 2020 CoreMark /856 DMIPS performance executing from Flash memory, with 0-wait states thanks to its L1 cache. The DSP instructions and the double-precision FPU enlarge the range of addressable applications. External memory can be used with no performance penalty thanks to the L1 cache (16 Kbytes +16 Kbytes of I-cache and D-cache).
Authenticate and protect your software IP while performing initial programming or firmware upgrades in the field*
*Available in 2018
The new LCD-TFT controller interface with dual-layer support takes advantage of the Chrom‑ART Accelerator™. This graphics accelerator creates content twice as fast as the core alone. As well as efficient 2-D raw data copy, additional functions are supported by the Chrom-ART Accelerator such as image format conversion or image blending (image mixing with some transparency). As a result, the Chrom-ART Accelerator boosts graphics content creation and saves the processing bandwidth of the MCU core for the rest of the application. In addition, the STM32H743/753 lines embed a JPEG hardware accelerator for fast JPEG encoding and decoding, off-loading the CPU which remains available for other tasks.
The STM32H7x3 line provides from 1 to 2 Mbytes of Flash memory, 1 Mbyte of SRAM with a scattered architecture: 192 Kbytes of TCM RAM (including 64 Kbytes of ITCM RAM and 128 Kbytes of DTCM RAM for time-critical routines and data), 512 Kbytes, 288 Kbytes and 64 Kbytes of user SRAM, and 4 Kbytes of SRAM in backup domain to keep data in the lowest power modes and 100- to 240-pin packages in BGA and LQFP profiles.
The STM32H753 integrates a crypto/hash processor providing hardware acceleration for AES-128, -192 and -256 encryption, with support for GCM and CCM, Triple DES, and hash (MD5, SHA-1 and SHA-2) algorithms.