ESSCIRC, ESSDERC
Starting September 6, 2021
Fully Virtual Coference
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ESSCIRC - ESSDERC is the annual European forum that brings together the scientific community to discuss recent advances in solid-state devices and circuits. Keynotes, paper presentations, joint sessions, workshops, and tutorials will cover all aspects of advanced devices and circuits. The 2021 edition is co-organized by CEA-Leti, STMicroelectronics, Soitec and Grenoble-Alpes University.
STMicroelectronics confirmed its Diamond sponsorship for the 2021 edition and we are contributing with multiple authoritative research papers, and are members of the Organizing Committee and the Technical Program Committee. The opening keynote of the conference, dedicated to AI @ the Edge, will be delivered by Joel Hartmann, ST’s Executive Vice President Digital & Smart Power Technology and Digital Front-End Manufacturing.
This year’s edition will be held fully virtual. Save the date and join us in September!
| Time (CET) | Title | Speakers |
| 13 Sept 15-15:45 | Joint Plenary – Keynote (A1L-1) Artificial Intelligence: Why Moving it to the Edge? | Joel Hartmann, ST Presenter |
| ON DEMAND by 6 Sept | Paper presentation (A2L-1) Imaging Arrays & Detectors Session 4.6μm Low Power Indirect Time-of-Flight Pixel Achieving 88.5% Demodulation Contrast at 200MHz for 0.54MPix Depth Camera | Cedric Tubert, ST paper presenter |
| ON DEMAND by 6 Sept | Paper Presentation (A2L-1) Imaging Arrays & Detectors Session Dark Count Rate in Single-Photon Avalanche Diode: Characterization and Modeling Study | Mathieu Sicre, ST paper presenter |
| ON DEMAND by 6 Sept | Paper presentation (A4L-4) Harvesting & Control Session An 800-Ma Time-Based Boost Converter in 0.18um BCD with Right-Half-Plane Zero Elimination and 96% Power Efficiency | Alessandro Bertolini Alessandro Gasparini, ST co-authors |
| ON DEMAND by 6 Sept | Paper presentation (A5L-3) High Performance Computing & Monitoring Session A Review of Circuit Monitoring in 28nm FDSOI and 40nm Bulk CMOS Technologies | Ricardo Gomez Gomez, ST paper presenter |
| ON DEMAND by 6 Sept | Paper presentation (B2L-5) Advanced Devices & Processing Session Improving Ge-Rich GST ePCM Reliability Through BEOL Engineering | Andrea Redaelli, ST paper presenter |
| ON DEMAND by 6 Sept | Paper presentation (B4L-5) Simulation & Modeling of Defects & Traps Session Impact of Hot Carrier Degradation on the Performances of Current Mirrors Based on a 55 nm BiCMOS Integrated Circuit Technology | Didier Céli, ST co-author |
| ON DEMAND by 6 Sept | Paper presentation from SSC-L Special Edition ESSCIRC 2020(B4L-4) Frequency Synthesis & Related Circuits A 2.5-GHz Clock Recovery Circuit Based on a Back-Bias-Controlled Oscillator in 28-nm FDSOI | Andreia Cathelin, ST co-author |
| ON DEMAND by 6 Sept | Paper Presentation (B5L-5) Simulation & Modeling for Memory & Imaging Applications Session Semi-Empirical Model for Optical Properties of SiGe Alloys Accounting for Strain and Temperature | Jeremy Grebot, ST paper presenter |
| ON DEMAND by 6 Sept | Paper Presentation (B5L-5) Simulation & Modeling for Memory & Imaging Applications Session Comprehensive Modeling and Characterization of Photon Detection Efficiency and Jitter in Advanced SPAD Devices | Remi Helleboid, ST paper presenter |
| ON DEMAND by 6 Sept | Paper Presentation (B5L-6) Emerging Sensor Technologies Session Design and Fabrication of a Ring-Coupled Mach-Zehnder Interferometer Gyroscope | Eva Kempf, ST paper presenter |
| ON DEMAND by 6 Sept | Paper Presentation (C4L-3) High-speed Data Converters Session 200-GS/S ADC Front-End Employing 25% Duty Cycle Quadrature Clock Generator | Pascal Chevalier, Andreia Cathelin, ST co-authors |
| ON DEMAND by 6 Sept | Paper presentation from SSC-L Special Edition ESSCIRC 2020(C4L-4) Digital Design Solutions for Wireless Communications A Wide Tuning Range Delay Element for Event-Driven Processing of Low-Frequency Signals in 28-nm FD-SOI CMOS | Angel de Dios Gonzalez ST paper presenter |
Live Q&A Session calendar (13-17 Sept) is available here
Educational Events
| Speakers | Title | Session Title |
| Antonio Andreini | The Smart Power BCD evolution in the year of the IEEE milestone | 7. IPCEI on Microelectronics: Innovative Technologies for Shaping the Future |
| Jean Devin | 40nm eNVM technology for high performances and secure MCU | 7. IPCEI on Microelectronics: Innovative Technologies for Shaping the Future |
| Alessandro Sitta | Structural characterization and simulation of a direct-cooled power module | 7. IPCEI on Microelectronics: Innovative Technologies for Shaping the Future |
| Jean Michailos | Image sensor hybrid bonding and sequential integration | 6. High Density 3D CMOS Mixed-Signal Opportunities |
| Frederic Gianesello | Advanced 200 mm and 300 mm RF SOI Technologies Targeting 5G and beyond (6G) RF Front End Module SOC | 9. SOI technology and design challenges for RF and mmWave: from Front-End Modules to SoC |
| Bernard Kasser | Embedded security: A silicon provider’s perspective | 12. Hardware security |
Live Q/A Session - Agenda
20 Sept 15:00-16:30 CEST – Session 12
20 Sept 17:00-18:30 CEST – Session 6
21 Sept 15:00-16:30 CEST – Session 7
22 Sept 15:00-16:30 CEST – Session 9
Several ST experts and scientists are involved in the conference. Dominique Thomas is the General co-chair. Andreia Cathelin is the ESSCIRC 2021 TPC chair, while Sylvain Clerc is the co-chair. Denis Rideau is the Chief Virtual Officer of the conference, and finally Davide Pandini is co-chair of the Educational Events.
Several ST experts are also members of the Technical Program Committee: Andrea Redaelli, Denis Rideau, Frédéric Boeuf, Nitin Chawla, Sara Pellegrini, Cédric Tubert, Paras Garg, Marco Zamprogno, Philippe Cathelin, Sylvain Clerc (also track chair) and Giulio Ricotti.
