Webinar: Understanding LDO architectures and their impact on noise-sensitive applications

ldo regulators


Not all LDOs are created equal  ̶  While all LDO regulators provide a cleaner supply voltage vs. switching regulators, some LDOs are better than others in designs requiring high supply voltage rejection.

Whether standalone or integrated inside PMICs, low-dropout voltage regulators (LDOs) are the basic building block in most power supplies. In electronic systems that are susceptible to noise, such as RF transceivers with high-sensitivity data converters and precision signal processing, a constant voltage supply free from unwanted disturbance is required for optimal performance.

While the primary purpose of an LDO is to accurately generate a constant supply voltage to power an electronic circuit, the way LDOs operate also makes them very effective at filtering out upstream power supply noise, preventing disruptive electronic signals from affecting those noise‐sensitive loads.

This presentation will explore the most commonly-used LDO architectures and explain how the dynamic characteristics of LDOs translate into a "clean" power supply voltage. The video will also address LDO thermal design and its control loop stability, in an effort to clear common misunderstandings and avoid costly PCB design mistakes.



Jeff Halio is a Product Marketing Engineer at STMicroelectronics. Jeff has over 20 years of field applications experience in design and semiconductor sales. Over the course of his career, he has toggled between digital and analog electronics. Jeff strives for a balanced skill set that allows him to tackle designs at a system level. In his spare time, he can be found at Gillette Stadium, fine-tuning his tailgating and grilling techniques, and cheering on The Revs. Jeff earned his BS in Electrical Engineering from Tufts University.