The M74HC280 is a high-speed CMOS 9-bit parity generator fabricated with silicon gate C2MOS technology.
It is composed of nine data inputs (A to I) and odd/even parity outputs (ΣODD and ΣEVEN). The nine data inputs control the output conditions. When the number of high-level inputs is odd, ΣODD outputs are kept high and ΣEVEN outputs are kept low. Conversely, when the number of high-level outputs is even, ΣEVEN outputs are kept high and ΣODD outputs are kept low. The IC generates either odd or even parity making the application flexible. The word-length capability is easily expanded by cascading.
All inputs are equipped with protection circuits against static discharge and transient excess voltage.
- High-speed: tPD = 22 ns (typ.) at VCC = 6 V
- Low power dissipation: ICC = 4 μA (max.) at TA = 25 °C
- High noise immunity: VNIH = VNIH = 28 % VCC (min)
- Symmetrical output impedance: |IOH| = IOL = 4 mA (min.)
- Balanced propagation delays: tPLH ≅ tPHL
- Wide operating voltage range: VCC (opr) = 2 V to 6 V
- Pin and function compatible with 74 series 280
- ESD performance
- HBM: 2 kV
- MM: 200 V
- CDM: 1 kV
Recommended for you
|Part Number||Marketing Status||Package||Grade||RoHS Compliance Grade||Material Declaration**|
RoHS Compliance Grade
(**) The Material Declaration forms available on st.com may be generic documents based on the most commonly used package within a package family. For this reason, they may not be 100% accurate for a specific device. Please contact our sales support for information on specific devices.