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The STM32H750 Value line of microcontrollers includes an Arm® Cortex®-M7 core (with double-precision floating point unit) running up to 480 MHz. The embedded Flash memory of 128 Kbytes allows ST to offer a cost-efficient solution for developers.

Performance

  • 480 MHz fCPU/, 2424 CoreMark /1027 DMIPS executing from Flash memory, with 0-wait states thanks to its L1 cache.
  • 128 Kbytes of embedded Flash for user root of trust, critical real time routines execution and easy configuration of external memories
  • L1 cache (16 Kbytes of I-cache +16 Kbytes of D-cache) boosting execution performance from external memories.

Security

The STM32H750 integrates:

  • Crypto/hash hardware acceleration
  • Secure Firmware Install (SFI) embedded security services to authenticate and protect your software IPs while performing initial programming
  • Secure Boot Secure Firmware Update (SBSFU)

Power efficiency

  • Multi-power domain architecture enables different power domains to be set in low-power mode to optimize power efficiency.
  • USB regulator to supply the embedded physical layer (PHY).
  • 275 µ/MHz typical @VDD = 3.3 V and 25 °C in Run mode (peripherals off)

Graphics

  • LCD-TFT controller interface with dual-layer support
  • Chrom‑ART Accelerator™ boosts graphical content creation while saving core processing power, thus freeing up the MCU for other application needs
  • JPEG hardware accelerator for fast JPEG encoding and decoding, off-loading the CPU.

Embedded peripherals

  • Up to 35 communication interfaces including FD-CAN, USB 2.0 high-speed/full-speed, , Ethernet MAC, camera interface,.
  • Easily extendable external memories using the flexible memory controller with a 32-bit parallel interface supporting, SRAM, PSRAM, NOR, NAND and SDRAM memories, or the Dual-mode Quad-SPI serial Flash memory interface.
  • Analog: 12-bit DACs, fast 16-bit ADCs
  • Multiple 16- and 32-bit timers running at up to 480 MHz on the 16-bit high-resolution timer.

The STM32H750 Value line provides 128 Kbytes of Flash memory, 1 Mbyte of SRAM with the following architecture: 192 Kbytes of TCM RAM (including 64 Kbytes of ITCM RAM and 128 Kbytes of DTCM RAM for time-critical routines and data), up to 512 Kbytes of user SRAM, and 4 Kbytes of SRAM in the backup domain to keep data in the lowest power modes and LQFP100, LQFP144, LQFP176, UFBGA176 and TFBGA240 packages.

 


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