DAC 2023
 FROM CHIPS TO SYSTEM - LEARN TODAY, CREATE TOMORROW | 09-13 July – Moscone West Center |
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Full agenda60th Design Automation Conference
Founded in 1964, DAC is the longest-running and largest event focused on research and technology for the design and the design automation of electronic chips to systems. DAC offers outstanding training, education, exhibits and superb networking opportunities for designers, researchers, tool developers and vendors.
This year ST will demonstrate its innovative solutions and methodologies in the field of not only designs but also how to build them. ST's experts will share their visions in the new era of design and verification flows, helping engineers design and create state-of-the-art solutions and reach the market on time while ensuring the highest quality. Follow us at DAC. We have several paper and poster presentations on the agenda showcasing our latest research on a variety of focus areas. You will also find us in the Gladiator Arena!
Check out the list of topics below!
| PAPER Presentation PTD time zone | ||
| Monday 10 July 1:30-1:45 PDT | Requirements management flow on digital projects with Reqtracer | Alessandro Iannuzzi, ST presenter Antonino Russo, Huqing Zheng, ST authors |
| Monday 10 July 2:30-2:45 | Comprehensive Validation Solution for Silicon IP&Library | Anil-Kumar Dwivedi, ST presenter Lippika Parwani, Jean-Arnaud Francois, ST authors Siddharth Ravikumar, Wei Tan, Siemens EDA authors |
| Monday 10 July 3:45-4:00 | Digital Design Flow for Area-Constrained IPs Using Custom Non-standard IEEE-754 Format | Marco Castellano ST presenter Marco Leo ST author |
| Monday July 10 4:15-4:30 PDT | Low power DAC sub-system for Digital Beam Forming Chip | Rupesh Singh, ST presenter Ankur Bal, ST author |
| Tuesday, July 11 1:30-1:45 | An automated flow for High Performance Asynchronous Digital Controllers | Enea Dimroci, ST presenter Francesco Battini, Roberta Priolo, ST authors |
| Tuesday, July 11 1:45-2:00 | Weak Link Detection in Memory Periphery using Design Robustness Analysis | Rohit Kumar Gupta, ST presenter Ashish Kumar, Shashank Gupta, ST authors Rakesh Shenoy, Rayson Yam, Synopsys authors |
| Tuesday, July 11 2:30-2:45 | Fast and Accurate Phase Noise Analysis of Crystal Oscillator in 28 FDSOI Process | Atul Bhargava, ST presenter Sahil Kumar, Nitin Jain, Atul Bhargava ST authors Prayes Jian, Cadence Design Systems author |
| Wednesday, July 12 2:15-2:30 | A novel IP for Real Time DC Estimation and Removal | Vikram Singh, ST presenter Ankur Bal, ST author |
POSTER PRESENTATIONS – meet the Poster Gladiator contestants in the DAC Pavilion – more here
| Monday July 10, 5-6 PDT | |
| Quality Assurance of DRC deck by QA Cell Methodology and Automation using Cadence Skill | Atul Bhargava, ST presenter Ambika Bhardwaj, Chirag Agarwal, ST authors |
| Ultra-Low Voltage Enablement for Standard Cells with Moment based LVF Poster Gladiator Contestant | Rohit Kumar Gupta, ST presenter Etienne Mauirn, Sebastien Marchal, Jean-Arnaud Francois, Oliver Minez, Chiranjeev Kumar Grover, ST authors |
| Using Machine Learning to Optimize and Accelerate Random Regression Testing | Davide Sanalitro, ST presenter Emilio Stante, ST author Maurizio Martina, Polytechnic University of Turin |
| Floorplan for implementation Methodology to the Next MSoT Smart Power (BCD) Designs | Livio Fratantonio, ST presenter Massimiliano Innocenti, Riccardo Guglielmo ST authors Stefano Basile, Jonhatan Olave, Cadence Design Systems authors |
| A Method to Plan & Generate IO Ring based on CSV Specifications | Atul Bhargava, ST presenter Rajeev Singh, Manvi Dhawan, ST authors Akshita Bansal, Vishesh Kumar, Hitesh Marwah, Cadence Design Systems authors |
| Requirement tracing for Design Flow in communication protocols IP Poster Gladiator Contestant | Marco Meuli, ST presenter |
| A Structured way of Communication in Layout Design Flow through Virtuoso Design Intent Poster Gladiator Contestant | Atul Bhargava, ST presenter Priya Meharde, Anil Nagendra, Aditya Sharma, ST authors Priyanshi Shukla, Cadence Design Systems author |
| Automated Clock Analysis, Skew Group Generation & CT Verification Poster Gladiator Contestant | Raghubeer Singh, ST presenter Harshil Niranjanbhai UPADHYAY, Anil Yadav, ST authors |
| Tuesday July 11, 5-6 PDT | |
| Accurate Behavioral Modeling Technique for Simultaneous Active Multiple LVDS Line Driver | Anil Dwivedi, ST presenter Natish Singla, Saurabh Srivastava, Mihir Pratap, Anil Dwivedi, Atul Bhargava, ST authors |
| Preventing Iterations from SoC Implementation Stage by Developing Pin Accessible Standard Cell Library | Atul Bhargava, ST presenter Sharmistha Sinha, Anand Mishra, Anuradha Ray, Frederic Avellaneda, ST authors Parul Agrawal, Hitesh Marwah, Neha Agrawal, Vishesh Kumar, Cadence Design Systems authors |
| A design analytics-based methodology for enhancing dynamic IR signoff with minimum design changes | Atul Bhargava, ST presenter Amit Singh, Govind Pal, Sanjeev Jain, Anil Yadav, ST authors Amit Jangra, Koshy John, Ansys authors |
| Unified Solution for CAD Development of Analog, Digital & Mixed Signal IPs Poster Gladiator Contestant | Anil Dwivedi, ST presenter Lippika Parwani, Bhupendra Singh, Gaurav Goel, ST authors |
| Design For Testability in Asynchronous Digital Controllers - An automated flow to design and validate asynchronous logic for digital controllers | Francesco Battini, ST presenter Enea Dimroci, Roberta Priolo, Marco Leo, ST authors |
| A Digital Emulator for an Analog Continuous Time Sigma Delta Modulator | Vikram Singh, ST presenter Ankur Bal, ST author |
| Wednesday July 12, 5-6 PDT | |
| An efficient and spice aligned method for complex IO's behavioral model generation and verification | Anil Dwivedi, ST presenter Natish Singla, Saurabh Srivastava, Harsh Garg, Avinav Joshi, Atul Bhargava, Anil Dwivedi, ST authors Matthieu Fillaud, Siemens EDA author |
| Hazard Detection in Asynchronous Finite State Machines Transition Logic | Roberta Priolo, ST presenter Francesco Battini, Enea Dimroci, ST authors |
| Automated and integrated dynamic voltage drop IR-ECO flow on automotive ADAS SoCs | Atul Bhargava, ST presenter Manish Kumar, Govind Pal, Samant Paul, Anil Yadav, ST authors Amit Jangra, Koshy John, Ansys authors |
