Design Automation Conference 2021


Design Automation Conference

 

5-9 December 2021 (San Francisco)
13 December - 1 January 2022 (virtual format)

 

Website

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Find out more about ST papers presented at the DAC here

Explore Electronic Design Automation (EDA)

STMicroelectronics will be presenting 9 papers and posters at the 58th edition of the Design Automation Conference (DAC), which will be in hybrid format this year.

ST will share knowledge and technical expertise on both digital and analog technologies and state-of-the-art production methods developed at ST to complement our EDA programs.

DAC is the longest-running, largest and premier event dedicated to the design and design automation of electronic systems and circuits. The 2021 edition will focus on the latest methodologies and technological advancements in electronic design, and in the automation of electronic chip design and system designs. With the hybrid format enabling both in-person and/or virtual attendance, the conference attracts the entire system design and development ecosystem: researchers, government representatives, and industry players.

The conference will cover EDA, Embedded Systems, Automotive, IoT, IP, Machine Learning/AI, Design and Security, inviting researchers, designers, practitioners, tool developers, students, and vendors, who are interested in learning, networking, conducting business and inspiring the future of electronic design.

Date Time (PST) Title Speaker
On demand Virtual platform   Paper
High Bandwidth All-Digital Clock and Data Recovery Architecture
Ankur Bal
On demand Virtual platform   Paper
Systematic Generation and Refresh of Standard Cell Abutment Database
Anuradha Ray
On demand
Virtual platform
  Paper
Diagnostic Coverage of Memory IP with Fault Injection Simulation using TestMAX Custom Fault Simulator
Dhori Kedar Janardan
Dec 6 5pm Poster
Early Layout Area and PLS Estimation by Designers
Akshita Bansal
Dec 6 5pm Poster
Accelerating Standard Cells Variation-Aware Characterization Methodology with Machine Learning Techniques
 Rajnish Garg
Dec 7 5pm Paper
Mitigating Variability Challenges of IPs for Robust Designs
 Atul Bhargava
Dec 7 5pm Poster
Automated Generation of Current Controlled Oscillator (CCO) Layout using Template Reuse Flow
Rajeev Singh
Dec 7 5pm Paper
Innovative In-Situ Slack Monitor (IS2M) Design for Dynamic Detection of Voltage Temperature Ageing Change
 Rohit Goel
Dec 7 5:30pm Poster Gladiator session  Atul Bhargava
Dec 8 5pm Poster
Expediting Data Converter Layouts using Design Planning & Analysis (DPA) Automation
 Atul Bhargava
       


For further information, please contact: nidhi-sehgal.kaul@st.com