STVMOCA

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Product overview

描述

The STVMOCA device, in conjunction with the AFE transceiver, connects ST back-end devices to the home MoCA network as defined by the MoCA standard (specification v1.1). The STVMOCA chip is mainly associated with the back-end devices of the STx71xx family, such as STi7105, and the STiHXXX families. The STVMOCA chip contains MAC and PHY processing and a high-speed SERDES interface to the analog front-end (AFE) device.
The IC may be interfaced to the host processor via the GMII port.
  • All features

    • Supports MoCA v1.1 in A, B, C, D, E and F bands
    • Digital MAC and PHY processing
    • External analog front end (AFE)
    • AFE connected via 3-Gb/s SERDES link
    • SPI for AFE initialization
    • Giga-MII (GMII) interface
    • STMoCA manager application software in Linux stack on host
    • Firmware-based MoCA state machine capable of in-field update
    • Tx and Rx are 256-QAM capable (optional)
    • Up to 16 nodes
    • Data rate 170 Mb/s
    • Aggregation up to 10 frames
    • 16 parameterized quality of service (PQoS) flows
    • Four fixed-priority (high, medium, low and broadcast) flows
    • 1.2-V and 3.3-V supplies, plus 2.5 V from the internal regulator
    • Package: 240-pin LFBGA 15x15 mm²

EDA Symbols, Footprints and 3D Models

STMicroelectronics - STVMOCA

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