SPC56XX 32-Bit Single-Core Power Architecture Training

SPC560/SPC570/SPC580 32-Bit Power Architecture content

STMicroelectronics SPC56x Architecture: Overview

Power Architecture (e200z0h) Overview

• CPU, pipeline, register sets
• Memory model
• Memory units: SRAM, flash memory

Overview: Instruction Set

On-chip Bus Systems

• Multi-layer AHB crossbar switch XBAR
• Peripheral bridge, peripheral bus

Interrupt and Exception Handling: Vector Table and Service Routines

• Interrupt controller INTC

Direct Memory Access Controller DMA

SPC56x On-chip Peripherals:

Timer Modules

• Software watchdog timer module SWT
• System timer module STM
• Periodic interrupt timer PIT
• Real-time clock module RTC
• FlexPWM unit
• Enhanced timer eTimer
• Enhanced modular IO subsystem eMIOS

Cross Triggering Unit CTU

Analog-Digital Signal Processing

• 10 bit /12 bit analog-digital converter ADC

Communication Interfaces

• Deserial / serial peripheral interface DSPI
• Enhanced serial communication interface eSCI / LINFlex
• FlexCAN
• Safety port

CRC Module

System Integration Unit Lite SIUL

Fault Collection Unit FCU

System Configuration

• Reset configuration, monitoring and generation
• Clock generation: FMPLL, internal oscillator
• External interrupts
• GPIO (pin definition and port functions)
• External multiplexing (e.g. ADC, DSPIs)
• Start-up process
• Boot assist module BAM

Power Management Controller PMC

Debug Interfaces

• JTAG controller JTAG, Nexus2+ interface

Exercises

• Exercises are performed with an SPC56x starter kit, focusing on the aspects interrupt controller, DMA controller, basic peripheral modules