The ST54K is a single-die solution integrating a contactless front-end (CLF) and a secure element, called ST54K_CLF and ST54K_SE, respectively. It is designed for integration in mobile devices and NFC-compliant products.
The ST54K_CLF includes near-field communication (NFC) functions in the three operating modes: Card Emulation, Reader/Writer and Peer-to-Peer communication.
It is best in class in terms of RF output power (up to 2 W). With its outstanding output power and optimized efficiency, the ST54K driver can be connected to metal frame antennas. Thanks to improved low-power card detection sensitivity, in Reader/Writer mode, the ST54K_CLF operating in low-power mode is capable of detecting the presence of a card/tag from a distance greater than the Reader mode performance.
In Card Emulation mode, the ST54K_CLF is capable of operating without an external quartz or an external reference clock source, contributing to further reducing the current consumption of the system in low-power mode. Moreover, thanks to its improved field detection sensitivity, the ST54K_CLF is capable, in low-power mode, of detecting the presence of a reader's RF field from a distance greater than the CE mode performance.
The ST54K_SE is a serial access microcontroller designed for secure mobile applications. It incorporates the most recent generation of Arm® processors for embedded secure systems. The SecurCore® SC300™ 32-bit RISC core is built on the Cortex®-M3 core, with additional security features to help to protect against advanced forms of attacks.
The ST54K device offers connectivity and security with its UWB subsystem, which supports emerging secure fine ranging as defined and standardized by the Car Connectivity Consortium® (CCC) and the FiRa™ Consortium.
The CCC specifies and ensures the interoperability of digital key (DK) phase 3 seamless car opening applications while the FiRa™ Consortium specifies and ensures the interoperability of multiple UWB use cases including access control and transit.
Single die integrating an NFC controller, a secure element and a UWB secure, fine-ranging subsystem host
Small, ECOPACK-compliant WLCSP81 package
State of-the-art secure element and eSIM Java® operating system.
100% re-flashing capability for firmware update
Enhanced active load modulation technology
Enhanced TX drive up to 2 W with support of an external 5 V DC/DC converter for TX supply
Optimized for extremely small or metal-frame antennas
Optimized power consumption modes
Ultralow-power Hibernate mode with field detection for low-power mode support
Proprietary in-frame synchronization (IFS) in Card Emulation (CE) mode to ensure stability in battery Low and Switched OFF modes
Fractional-N PLL input range of 19.2 to 76.8 MHz
27.12 MHz external crystal oscillator
Automatic wakeup via communication interfaces, internal timers, GPIO, RF field or tag detection
NFC active and passive Peer-to-Peer mode
ISO/IEC 18092 - NFCIP-1 Initiator & Target
NFC Reader/Writer mode
NFC Forum™ Type 1/2/3/4/5 tags
NFC Card Emulation mode
ISO/IEC 14443 Type A & Type B
Ultra-wideband (UWB) subsystem host control:
Car Connectivity Consortium® (CCC) digital key (DK) phase 3
FiRa™ (fine ranging) secure UWB use cases
External communication interfaces
Two master SWP interfaces operating at up to 1.695 Mbit/s
Slave I²C interface supporting Standard-mode, Fast-mode, Fast-mode Plus and High-speed mode
Master SPI running at up to 8 MHz dedicated to the UWB subsystem
Slave SPI interface running at up to 26 MHz
ISO/IEC 7816-3 interface
General-purpose inputs/outputs (GPIOs)
Internal communication interfaces
CLF/SE SWP digital interface
120 Mbits/s interprocessor communication (IPC) based on a shared internal memory
SC300™ 32-bit RISC core cadenced at 100 MHz
Up to 2048 Kbytes of user Flash memory
2 Kbytes of memory cache
64 Kbytes of user RAM
Power-saving Standby and Hibernate states
Secure operating system
Supports state-of-the-art secure element operating systems:
Java® Card 3.0.5
GlobalPlatform® 2.3 with Amdts
Security-certified according to CC EAL5+
Hardware security-enhanced DES & AES accelerators
MIFARE Classic cryptography hardware accelerator
NESCRYPT coprocessor for public key cryptography algorithms
Battery voltage support from 2.4 V to 5.0 V
I/O dedicated voltage level (VPS_IO) from 1.62 V to 3.3 V
Supports Class B and Class C operating conditions for external universal integrated-circuit cards (UICCs)