Product overview
Description
This family of MCUs targets automotive powertrain controller applications for four-cylinder gasoline and diesel engines, chassis control applications, transmission control applications, steering and braking applications, as well as low-end hybrid applications.
Many of the applications are considered to be functionally safe and the family is designed to achieve ISO26262 ASIL-D compliance.
-
All features
- Two main 32-bit Power Architecture® VLE compliant CPU core (e200z4), dual issue, running in lockstep
- Single-precision floating point operations
- 16 KB local instruction SRAM and 64 KB local data SRAM
- 4 KB I-Cache and 2 KB D-Cache
- One 32-bit Power Architecture® VLE compliant I/O processor core (e200z2)
- Single-precision floating point operations
- Lightweight Signal Processing Auxiliary Processing Unit (LSP APU) instruction support for digital signal processing (DSP)
- 16 KB local instruction SRAM and 48 KB local data SRAM
- 2624 KB on-chip flash memory
- Supporting EEPROM emulation (64 KB)
- 64 KB on-chip general-purpose SRAM (+112 KB data RAM included in the CPUs)
- Multi-channel direct memory access controller (eDMA) with 32 channels
- Dual interrupt controller (INTC)
- Dual phase-locked loops, including one Frequency-modulated
- System integration unit lite (SIUL)
- Boot Assist Flash (BAF) supports factory programming using a serial bootload through the asynchronous CAN or LIN/UART
- Generic timer module (GTM122)
- Intelligent complex timer module
- 88 channels (24 input and 64 output)
- 3 programmable fine grain multi-threaded cores
- 26 KB of dedicated SRAM
- Hardware support for engine control, motor control and safety related applications
- Enhanced analog-to-digital converter system with:
- 1 supervisor 12-bit SAR analog converter
- 4 separate fast 12-bit SAR analog converters
- 2 separate 16-bit Sigma-Delta analog converters
- 5 Deserial Serial Peripheral Interface (DSPI) modules
- 5 LIN and UART communication interface (LINFlexD) modules
- 3 MCAN interfaces with advanced shared memory scheme, two supporting ISO CAN-FD and one supporting TTCAN
- One Ethernet controller 10/100 Mbps, compliant IEEE 802.3-2008
- Dual-channel FlexRay controller
- Nexus development interface (NDI) per IEEE-ISTO 5001-2003 standard, with partial support for 2010 standard
- Device and board test support per Joint Test Action Group (JTAG) (IEEE 1149.1)
- Single 5 V +/-10% Power supply supporting cold start conditions (down to 3.0 V)
- Designed for eTQFP144 and eLQFP176
- Two main 32-bit Power Architecture® VLE compliant CPU core (e200z4), dual issue, running in lockstep
EDA Symbols, Footprints and 3D Models
STMicroelectronics - SPC574K70E7
Speed up your design by downloading all the EDA symbols, footprints and 3D models for your application. You have access to a large number of CAD formats to fit with your design toolchain.
Symbols
Footprints
3D models