Product overview
Description
The ST33Jxxx is a serial access microcontroller designed for secure mobile applications. It incorporates the most recent generation of Arm®processors for embedded secure systems. Its SecurCore® SC300™ 32-bit RISC core is built on the Cortex®-M3 core with additional security features to help to protect against advanced forms of attacks.
The ST33Jxxx provides high performance thanks to a fast SC300 processor, crypto-accelerators (DES, AES and MIFARE Classic® ) and improved Flash memory operations. Cadenced at 60 MHz, the SC300™ core brings great performance and excellent code density thanks to the Thumb®-2 instruction set.
Strong and multiple fault protection mechanisms ensure a guaranteed high-detection coverage that facilitates the development of highly secure software. This is achieved by using two CPUs in locked-step mode, error codes in sensitive memories and hardware logic.
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All features
- Hardware features
- Arm® SecurCore® SC300™ 32-bit RISC core cadenced at 60 MHz
- Up to 2048 Kbytes of User Flash memory
- 50 Kbytes of User RAM
- External interfaces
- ISO/IEC 7816-3 T=0 and T=1 protocols (Slave and Master modes)
- Single Wire Protocol (SWP) slave interface (ETSI 102-613 compliant)
- Master/slave serial peripheral interface (SPI)
- Two Master/Slave I2C interfaces
- Three 16-bit timers with interrupt capability
- Watchdog timer
- Eight multiplexed general-purpose I/Os
- 1.8 V, 3 V and 5 V supply voltage ranges
- External clock frequency from 1 up to 15 MHz
- Current consumption compatible with GSM and ETSI specifications
- Power-saving standby and hibernate states
- Contact assignment compatible with ISO/IEC 7816-2
- ESD protection greater than 4 kV (HBM) and up to 1 kV (CDM)
- Delivery forms:
- D18 micromodule
- ECOPACK®-compliant WLCSP12 and QFN20 packages
- Sawn/unsawn 12” wafers
- Security features
- Platform and Flash loader security certification target according to CC EAL5+ / EMVCo
- Hardware security-enhanced DES accelerator
- Hardware security-enhanced AES accelerator
- MIFARE Classic® cryptography hardware accelerator
- NESCRYPT coprocessor for public key cryptography algorithm
- 16- and 32-bit CRC calculation block (ISO 13239, IEEE 802.3, etc.)
- Active shield
- Memory management unit
- Highly efficient protection against faults
- True random number generator
- Permanent timer
- Software features
- Secure Flash loader with high-speed downloading and post-delivery loading ability
- Optional NesLib public cryptographic library
- Optional MIFARE4Mobile®
- Hardware features
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STMicroelectronics - ST33J1M8
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Quality and Reliability
| Part Number | Marketing Status | Package | Grade | RoHS Compliance Grade | Material Declaration** |
|---|---|---|---|---|---|
| ST33J1M8 | Active | DICE | Industrial | N/A | |
ST33J1M8
Package:
DICEMaterial Declaration**:
(**) The Material Declaration forms available on st.com may be generic documents based on the most commonly used package within a package family. For this reason, they may not be 100% accurate for a specific device. Please contact our sales support for information on specific devices.
Sample & Buy
| Part Number | Marketing Status | Budgetary Price (US$)*/Qty | Order from ST | Order from distributors | Package | Packing Type | RoHS | Country of Origin | ECCN (US) | ECCN (EU) | Temperature (°C) | Operating Temperature (°C) (min) | ||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| min | max | |||||||||||||
| ST33J1M8 | | | distributors No availability of distributors reported, please contact our sales office | DICE | Not Applicable | FRANCE | 5A992.c | 5A002.a.1 | - | - | - | |||
ST33J1M8 Active
(*) Suggested Resale Price (USD) per defined quantity for BUDGETARY USE ONLY. For quotes, prices in local currency, please contact your local ST Sales Office or our Distributors