SecureSMX®, our next generation RTOS, enables dividing software for Cortex‑M microcontroller-based embedded systems into isolated partitions. This achieves high security by limiting hacker invasions so they cannot reach sensitive data, keys, passwords, and other vital information, nor access code or I/O in other partitions. Furthermore, it allows focusing scarce programmer talent on strengthening the most critical partitions.
In order to accomplish this, SecureSMX provides the following:
- Effective privileged mode (pmode) / unprivileged mode (umode) processor control.
- Efficient, flexible task-based Memory Protection Unit (MPU) control.
- Software Interrupt (SWI) API for system services.
- Partition portals for other services.
- Multi-heap support.
SecureSMX partitioning is similar, in concept, to ARM's Platform Security Architecture (PSA) and can be used with ARM's PSA RoT on Cortex-v8M processors or in place of it on Cortex-v7M processors.