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These circuits are high speed J–FET input quad operational amplifiers incorporating well matched, high voltage J–FET and bipolar transistors in a monolithic integrated circuit.
The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient.
主要特性
- Low power consumption
- Wide common-mode (up to VCC+) and differential voltage range
- Low input bias and offset current
- Output short-circuit protection
- High input impedance J-FET input stage
- Internal frequency compensation
- Latch up free operation
- High slew rate: 16v/ms (typ)
(**) The Material Declaration forms available on st.com may be generic documents based on the most commonly used package within a package family. For this reason, they may not be 100% accurate for a specific device. Please contact our sales support for information on specific devices.
