产品概述
描述
The SPC570Sx is a family of next generation microcontrollers built on the Power Architecture embedded category. The SPC570Sx family of 32-bit microcontrollers is the latest achievement in integrated automotive application controllers. It belongs to an expanding family of automotive-focused products designed to address the next wave of Chassis and Safety electronics applications within the vehicle. The advanced and cost-efficient host processor core of this automotive controller family complies with the Power Architecture embedded category and only implements the VLE (variable-length encoding) APU, providing improved code density. It operates at speeds of up to 80 MHz and offers high performance processing optimized for low power consumption. It capitalizes on the available development infrastructure of current Power Architecture devices and is supported with software drivers, operating systems and configuration code to assist with users implementations.-
所有功能
- AEC-Q100 qualified
- High performance e200z0h dual core
- 32-bit Power Architecture technology CPU
- Core frequency as high as 80 MHz
- Single issue 4-stage pipeline in-order execution core
- Variable Length Encoding (VLE)
- Up to 544 KB (512 KB code + 32 KB data, suitable for EEPROM emulation) on-chip flash memory: supports read during program and erase operations, and multiple blocks allowing EEPROM emulation
- Up to 48 KB on-chip general-purpose SRAM
- Multi-channel direct memory access controller (eDMA paired in lockstep) with 16 channels
- Comprehensive new generation ASILD safety concept
- Safety of bus masters (core+INTC, DMA) by delayed lockstep approach
- Safety of storage (Flash, SRAM) by mainly ECC
- Safety of the data path to storage and periphery by mainly End-to-End EDC (E2E EDC)
- Clock and power, generation and distribution, supervised by dedicated monitors
- Fault Collection and Control Unit (FCCU) for collection and reaction to failure notifications
- Memory Error Management Unit (MEMU) for collection and reporting of error events in memories
- Boot time MBIST and LBIST for latent faults
- Check of safety mechanisms availability and error reaction path functionality by dedicated mechanisms
- Safety of the periphery by application-level measures supported by replicated peripheral bridges and by LBIST
- Further measures on dedicated peripherals (e.g. ADC supervisor)
- Junction temperature sensor
- 8-region system memory protection unit (SMPU) with process ID support (tasks isolation)
- Enhanced SW watchdog
- Cyclic redundancy check (CRC) unit
- Dual phase-locked loops with stable clock domain for peripherals and FM modulation domain for computational shell
- Nexus Class 3 debug and trace interface
- Communication interfaces
- 2 LINFlexD modules, 3 deserial serial peripheral interface (DSPI) modules, and Up to 2 FlexCAN interfaces with 32 message buffers each
- On-chip CAN/UART Bootstrap loader with Boot Assisted Flash (BAF). Physical Interface (PHY) can be
- UART and CAN
- 2 enhanced 12-bit SAR analog converters
- 1.5 μs conversion time (12 MHz)
- 16 physical channels (fully shared between the 2 SARADC units)
- Supervisor ADC concept
- Programmable Cross Triggering Unit (CTU)
- Single 3.3 V or 5 V voltage supply
- 4 general purpose eTimer units (6 channels each)
- Junction temperature range -40 °C to 150 °C (165 °C grade optional)
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全部资源
| Resource title | 版本 | Latest update |
|---|
产品规格 (1)
| Resource title | 版本 | Latest update | ||
|---|---|---|---|---|
| 7.0 | 31 Jan 2018 | 31 Jan 2018 |
应用手册 (4)
| Resource title | 版本 | Latest update | ||
|---|---|---|---|---|
| 2.0 | 13 Sep 2018 | 13 Sep 2018 | ||
| 1.0 | 13 Sep 2018 | 13 Sep 2018 | ||
| 1.0 | 17 Mar 2021 | 17 Mar 2021 | ||
| 1.0 | 13 Sep 2018 | 13 Sep 2018 |
技术文档 (4)
| Resource title | 版本 | Latest update | ||
|---|---|---|---|---|
| 1.0 | 13 Sep 2018 | 13 Sep 2018 | ||
| 1.0 | 02 Feb 2016 | 02 Feb 2016 | ||
| 1.0 | 25 Sep 2019 | 25 Sep 2019 | ||
| 1.0 | 28 Apr 2016 | 28 Apr 2016 |
用户手册 (2)
| Resource title | 版本 | Latest update | ||
|---|---|---|---|---|
| 1.3 | 16 Jun 2015 | 16 Jun 2015 | ||
| 1.0 | 11 May 2015 | 11 May 2015 |
参考手册 (2)
| Resource title | 版本 | Latest update | ||
|---|---|---|---|---|
| 2.0 | 26 May 2015 | 26 May 2015 | ||
| 6.0 | 17 Dec 2015 | 17 Dec 2015 |
勘误手册 (1)
| Resource title | 版本 | Latest update | ||
|---|---|---|---|---|
| 8.0 | 26 Feb 2021 | 26 Feb 2021 |
工具/软件相关的应用笔记 (1)
| Resource title | 版本 | Latest update | ||
|---|---|---|---|---|
| 1.0 | 13 Sep 2018 | 13 Sep 2018 |
简报 (2)
| Resource title | 版本 | Latest update | ||
|---|---|---|---|---|
| 04 Feb 2016 | 04 Feb 2016 | |||
| 30 Oct 2015 | 30 Oct 2015 |
EDA符号、封装和3D模型
STMicroelectronics - SPC570S40E1
为您的应用下载所有EDA符号、封装和3D模型，加快您的设计速度。您可以从大量CAD格式中进行选择，以匹配您的设计工具链。
符号
封装
3D模型
质量与可靠性
| 产品型号 | Marketing Status | 封装 | 等级规格 | 符合RoHS级别 | 材料声明** |
|---|---|---|---|---|---|
| SPC570S40E1CEFAR | 批量生产 | TQFP 64 10x10x1.0 | Automotive Safety | Ecopack2 | |
| SPC570S40E1CEFAY | 批量生产 | TQFP 64 10x10x1.0 | Automotive Safety | Ecopack2 |
(**) st.com上提供的材料声明表单可能是基于包装系列中最常用的封装的通用文档。因此，它们可能不是100%适用于特定的设备。有关特定设备的信息，请联系 销售支持 。
样片和购买
| 产品型号 | 从分销商订购 | 从ST订购 | 供货状态 | ECCN (US) | ECCN (EU) | 包装类型 | 封装 | 温度（ºC） | CPU Clock Frequency (MHz) (max) | Flash Size (kB) (Data) | Features set | Country of Origin | Budgetary Price (US$)*/Qty | 更多信息 | ||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 最小值 | 最大值 | |||||||||||||||
| SPC570S40E1CEFAR | 无法联系到经销商，请联系我们的销售办事处 | 批量生产 | 5A991B4A | NEC | Tape And Reel | TQFP 64 10x10x1.0 | -40 | 125 | 80 | 32 | ASILD/SIL3,Motor Control | MALTA | 5.3 / 1k | |||
| SPC570S40E1CEFAY | 无法联系到经销商，请联系我们的销售办事处 | Buy Direct | 批量生产 | 5A991B4A | NEC | Tray | TQFP 64 10x10x1.0 | -40 | 125 | 80 | 32 | ASILD/SIL3,Motor Control | MALTA | 5.3 / 1k | ||
供货状态
批量生产ECCN (US)
5A991B4ABudgetary Price (US$)*/Qty
5.3 / 1k