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低压降(LDO)线性稳压器

LDO(低压降)是一种线性稳压器,面向运行时输入-输出电压差(压降)非常低的应用。其目的是将设备上发热带来的功率散失降至最低,从而提高转换效率

我们的LDO稳压器系列是同类器件中最佳,包括:

LDO稳压器 vs 线性稳压器

线性稳压器 是一种经济划算的方式,用于提供稳定的输出电压,其特点是设计简单且外部组件较少。但是LDO稳压器可以在输出电流小于几安培且输出电压接近输入电压的应用中实现成本与性能的最佳平衡。

LDO稳压器 vs 开关转换器

DC-DC开关转换器相比,LDO稳压器不产生纹波,因此可以提供非常干净的电源电压。由于所需的外部无源元件数量最少,大大减少了设计工作量

低压降ldo稳压器

意法半导体的LDO稳压器实现了以下特性的最佳结合:

  • 低压差
  • 低静态电流(低IQ)
  • 快速的瞬态响应
  • 低噪声
  • 和出色的纹波抑制

尤其是,我们的超低压降稳压器是电池供电的消费和工业应用,以及便携式卫生保健设备的理想之选,因为:

  • 超低静态电流(低至0.3 µA)延长了电池使用寿命
  • 小型封装选项,包括0.65 mm x 0.65 mm倒装片和0.47 mm x 0.47 mm STSTAMP™,达到了最小的尺寸

由于具有高PSRR(电源抑制比)和低噪声的特点,所以可以沿着信号路径在很宽的输入电压和输出电流范围内保持高信号保真度。

ldo regulators low dropout
STLQ020, our LDO drops the mic
with fast response and 300 nA of quiescent current

Find the best design solution thanks to high-performances Quad-LDO evaluation board

The STEVAL-LDO001V1 allows smart evaluation of four ST's high-performance low-dropout linear voltage regulators specially designed for extend battery life in portable smart devices. Thanks to state-of-the-art technologies, designs and innovative packaging, designers can select the best solution in terms of ultra-low quiescent current, ultra-low noise and high PSRR, automatic green mode and miniature packages such as Flip-Chip or ST STAMP™.

Ultra-tiny low-dropout regulator in breakthrough bumpless chip-scale package

The LDBL20 is a powerful 200 mA LDO in a tiny 0.47 x 0.47 mm innovative ST STAMP™ chip-scale package. The input voltage can range from 1.5 to 5.5 V, with 200 mV typical dropout. Rejection (PSRR) of 80 dB at 100 Hz and 50 dB at 100 kHz simplifies filtering over a wide frequency range to provide a stable rail for low-power circuitry in battery-operated applications. Quiescent current of 20 µA no-load, 100 µA full-load, and 0.3 µA in standby help maximize efficiency under all operating conditions. 
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