静电放电 (ESD) 防护是EMC抗扰度（电磁兼容性）要求的一部分。它是设备为在电磁环境中正常运行而对可能造成物理损坏的电磁能量接收进行限制的能力。ESD可能以瞬态电压的形式出现，但其快速上升时间也可以导致辐射：强大的谐波与其他信号耦合将使应用呈现不稳定的行为。必须保护印刷电路板不受静电放电的影响。
随着当前CMOS工艺的安全工作区变得越来越窄，它们对ESD越来越敏感。硅制造商通常使用人体模型 (HBM) 表示受控环境中的ESD敏感性，然而在现实世界的系统层面，它要高得多。因此，在实际应用中，IO和电源轨需要IEC 61000-4-2和IEC61000-4-5标准规定的外部ESD保护。
- Protection finder移动应用程序让您通过便携式设备探索意法半导体的TVS产品组合。您可以使用参数或系列搜索引擎，轻松定义适合您应用的器件。
FAQ related to ESD protection
What is ESD protection?
ESD stands for electrostatic discharge. ESD is defined by the ESD association as the rapid, spontaneous transfer of electrostatic charge induced by a high electrostatic field.
It is the result of static electricity discharge. Static electricity is the collection of electrically charged particles on the surface of a material.
Various materials have a tendency of either:
- Giving up electrons and gaining positive (+) charges
- Attracting electrons and gaining negative (-) charges
Electrostatic discharge will cause potential failure on the integrated circuits of your PCB.
These failures are called electrical over stress (EOS), resulting in silicon melting, oxide punch-through, junction damage, metallization damage or degradation affecting the long-term reliability of your electronic system.
A survey from the EOS industry council shows that 30% of customer claims are due to ESD or EOS (electrical over stress). Furthermore, the miniaturization of the components is increasing the integrated circuits sensitivity to ESD.
Where can I get more information about eye diagram integrity?
Eye diagram information is defined by standards like USB, HDMI etc.
The ESD protection device compliancy with eye diagram is specified in the related datasheet, for example in HSP051-4M10.
What about other USB requirements related to ESD? (TD 4.1.2 or TD 4.12.2)
Eye diagrams can be negatively impacted by wrong ESD protection selection. An extremely high capacitance ESD protection may cause the eye diagram test to fail.
On the other hand requirements like attach / detach requirements (more functional) cannot be impacted by the ESD protection because ESD protection is transparent (high impedance and low capacitance in parallel with datalines) in normal operation.
TD 4.1.2 is related to USB Type-C test for Rp that must not be present for source application when source is OFF. ESD protection will be transparent in this test.
TD 4.12.2 is related to USB Type-C test checking if there is only one upstream port in a hub port device.
How to select the VCL? (what is the maximum transient voltage accepted by my circuit and if I can assume the maximum absolute voltage of my ICs or is there a better approach to follow?)
The absolute maximum rating (AMR) voltage value is not relevant because it is a DC measured voltage and not measured for a transient voltage, hence an intrinsically pessimistic value (AMR value is too low).
In the presented example the AMR value is too low, AMR = 5.5 V while the ESD destruction value is 12 V. The best approach to select the VCL is to apply the SEED methodology described in our ESD Webinar.
If any TLP information is available for the IC to be protected, the lower VCL will ensure the better protection.
Which ST specific part do you recommend to protect the RF port of a transceiver working at 868 MHz with 14 dBm output power? (it must have very low capacitance and low clampling voltage)
14 dBm corresponds to 1.6 V max on 50 Ω load. As a consequence, ESDARF02-1BU2CK matches the requirement at 868 MHz (no RF losses, VMAX < VRM and bi-directionnal for RF signaling).
What about protecting a power line? (VBUS in USB on slide 37 of our expert webinar)
Power lines require high current capability surge protection because lightning and switching transients are present on these lines (cf IEC61000-4-5) as well as some functional events generating inrush currents (full-load unplugged, adapter failure, etc). STMicroelectronics protection devices against IEC61000-4-5 surges are available.
Which part do you recommend for protecting 12 V DC outputs?
Which ESD protection component do you recommend when differential current measurement is used?
The original question during the webinar was: My design is analogic measurement current in an isolated high tension (25 kV) system. Sometimes, we have breakdowns, and we have damage (aop 1st stage AD4610 or a voltage regulator (+5 V or -15 V or +15 V). I tried to insert protective components without performance loss. I measured 5 nA current and some TVS diodes have leakage current 1 or 10 or 100 nA. Any useful reference in future can be test, it might be differential measurement.
Do we need ESD for the RS-485 transceivers or is it included?
Please check schematic in figure ESD14V2BP6 protection device schematic in AN5245.
ST485 transceiver can be split in 2 families:
- with system ESD protection (ST485E series)
- without system ESD protection (ST485 series)
When ST485E series cannot be placed close to the ESD source, it is required to use external ESD protections in order to avoid any EMI coupling with internal PCB tracks. EMI coupling induced by ESD can generate latch-up failures in your system.
Do I need additional ESD protection if I use digital isolators for I/Os (like Si86xx)?
Can I use the circuits for PSpice simulations and real test setups or is something missing?
Yes, it is a simplified but functional schematic. Real schematic is more complex with serial inductors.
Is the track on the PCB from the ESD source to the ESD protection device rated for the ESD maximum discharge current defined by the ESD level required?
The track maximum DC current is not critical due to the ESD event duration (≈100 ns).
Have ST all PSpice models of their porfolio?
You can find ST PSpice ESD protection models under SPICE models.
How do you connect the shield of the connector to the PCB?
We usually connect it to the GND of the system.
Should we connect ESD protection ground to 0 V or GND?
ESD protection ground must be connected to the reference GND plane of the protected I/O to limit or avoid any parasitic inductance effect due to multiple ground planes connection.
Where is the current going on slide 17 of our EMC expert webinar?
The current is flowing to the ground.
Is it really necessary to provide external ESD protection in case of no ESD protection for GPIO pins of a microcontroller built in?
It is only necessary to protect GPIO exposed to system-level ESD (connector, button) otherwise embedded HBM is enough.
Can you explain why ESD protection is needed with a USB-C connector housed in a plastic case?
ESD cannot be assimilated to simple conduction thought a metal track, it is a charge equilibrium between 2 systems. As a consequence, airdischarge can appear and non-conductive materials can let the charge flow (e.g. side key buttons on smartphone need to be protected).
Are there other types of ESD protection without using TVS?
Other types of ESD protection can be: MOV, polymer and PCB spark gap. All of them present very high clamping voltage and reliability issues that are not compatible with ESD protection of sensitive ICs.
When the use of TVS is not enough for protection (for example when voltage or current is exceeded), do you recommend serial resistor or other type of components?
Adding a serial resistor can be recommended because it will decrease the clamping voltage on protected IC I/O. But for some interfaces, adding a serial resistor may exceed the line impedance specified in the standard or decrease the bandwidth.
Can TVS diode and Zener diode be in parallel (Zener to protect from DC overvoltage and TVS to protect from transients)?
TVS protects against transient over-voltage while Zener is for voltage regulation, because not rated against surges nor over-voltages. To protect against DC over-voltage, an over-voltage protection (OVP) is required. OVP and TVS can be used together with TVS maximum clamping voltage slightly below OVP AMR.
Are there any easier rules to apply to choose the key parameters?
Secure margin between AMR and maximum ESD clamping voltage before destruction can be very scattered. To select the best ESD protection, bandwidth must not be over-sized, VRM must be just slightly higher than line voltage in order to lower the clamping voltage.
Regarding on the question about protecting a IO power line, the decoupling capacitor also lowers the voltage when a charge is injected, but are there specific requirements for this capacitor?
On power line, capacitor are selected to fit power requirement. The capacitor rated voltage must be higher than the clamping voltage of the TVS to avoid capacitor degradation or destruction when surge event occurs.
If I choose for the next version the ESDLIN1524BJ close to input current, can I place it at power inputs also to protect voltage regulators?
Is there any protection related to LEDs?
Standard ESD protection (ESD051-1BF4) can be used for LED protection. Bidirectional protection is recommended to test LED mounted on reverse.
What affordable and cheap ESD gun can you recommend?
We use Teseq ESD gun. We do not have any ESD gun benchmark.
What would you recommend for clothing when handling ESD sensitive devices?
In an ESD-controlled environment, a conductive lab coat with ESD wrist connected to the ground are recommended.
In terms of ESD certification of an electronic circuit board, can you recommend a provider of this service in France?
EMITECH is a French Lab.
Can you tell something about protection during soldering (ie: solder connector wires to a board)?
During soldering (connector as example), only HBM is relevant but the environment must be under control (operator with wrist connected to ground, solder iron connected to ground).
How do you protect multiple MCU pins that do not go outside the PCB and is it necessary? (boards can be completely damaged from accidental touching of a PCB pad)
PINs that do not go outside the PCB do not require specific ESD protection but special care is mandatory for handling (conductive lab coat with ESD wrist connected to the ground).
Is it possible to expose my problem with an application engineer in next days?
Feel free to reach us via our local support.
How do you measure ESD signals? Do you use scopes?
We use a high bandwidth, high sample rate oscilloscope on 50Ω with 40dB external input attenuation. See STMicroelectronics AN3353.
Can I use a Zener diode to clamp an ESD over-voltage?
A Zener diode is used for voltage regulation under DC-current condition but neither their silicon nor their package is rated for transient surge dissipation.
Only ESD or transient voltage suppressor (TVS) specify the transient surge they can dissipate.
Is a 30 kV ESD diode better for protection?
The best parameter to qualify the efficiency of an ESD protection is the clamping voltage because if your 30 kV ESD diode has a poor clamping voltage it means your application will be more sensitive to transient voltages.
ESD robustness higher than 8 kV has to be taken into account only if your application requires it like in automotive standard ISO10605.
How can I select the ESD protection based on my IC electrical parameters?
Because TLP data are not specified by ICs suppliers, you can only rely on the VRM of the line to be protected to select your ESD protection. In this case the clamping voltage after an 8 kV ESD contact discharge can help you to compare ESD protection efficiency.
I need to populate different interfaces with ESD protection, can I use the same ESD protection for all these interfaces?
Yes, but keep in mind that each interface has its own requirement. For example you may choose a low capacitance ESD in a 2-line package to protect Dplus and Dminus pins of an USB connector in order to keep the best signal integrity on these datalines whereas you may choose a single line ESD protection with high capacitance for a touch button to lower signal bouncing.
Is external ESD protection needed for CDM (charged device model)?
No, ESD protection according to CDM is granted for all ICs because it is related to component level protection like HBM.
What is exactly the VRM parameter of an ESD protection and what is it good for?
VRM is the maximal operating voltage of the protection to ensure a good transparency of the application voltage signal in the normal operation. The VRM of the ESD protection must be higher than the normal signal voltage amplitude. If the signal is negative and positive, the protection must be bi-directional to avoid rectifier phenomenon. If the signal to be protected is only positive, an unidirectional protection is preferred. Along with the VRM voltage there is also the protection current leakage parameter called IRM. A too high leakage current can affect the system overall consumption but it can also change a data line voltage. Usually, the leakage current is below 1 μA at VRM (ESDZV5 has IRM e.g. at 100 nA maximum).
What does is meant with snap-back ESD protection?
Standard ESD protections activate at breakdown voltage (called VBR) and their voltage increases with the current linearly to clamping voltage. The snap-back protection instead has a snap-back effect which means that it lowers its clamping voltage after the protection is triggered. The holding voltage (VH) is the lowest voltage when the snap-back protection has turnedon. The lower is the holding voltage, the better is the clamping voltage.
The figures below show on the left the I/V characteristics of a standard ESD protection and on the right the I/V characteristics of a snapback ESD protection.
How can we calculate the ESD protection level?
The resistor is always part of a system which has some specific characteristic. E.g. Operating voltage. In order to protect the system, your have to place a system level ESD protection with appropriate voltage linked to VRM on the weak point from where the ESD impact can come. This way you will also protect your resistor which have typical nominal voltage from 25 V to 100 V;
I am designing proximity sensor for the factory automation applications compliant with EN 60947-5-2 standard. The proximity sensor is classic 3 wire design and I am searching for transient and overvoltage protection compact solution. Is there anything from ST?
In ST we are focusing on factory automation applications in general and so also on sensors specifically. For example we have specific ICs to support the IO-Link sensor communication on the sensor slave side as well as on the IO-Link master side.
To protect 3 wire proximity sensors we propose a protection device called SPT01-335 which can protect 24 V proximity sensors. It implements the reverse polarity and the overvoltage protection of the sensor power supply and also this device integrates the power switch overvoltage protection in a small QFN 3x3 mms in size.
Is an external ESD protection is needed for CDM (Charged Device Model)?
No, ESD protection according to CDM is granted for all IC because it is related to component level protection like HBM.