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HD cable STB processor with integrated demodulator and low power standby controller
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The STiH223 uses the latest process technology to provide a cost-effective, feature rich, highly integrated SoC for set-top boxes (STBs). It is targeted at the advanced decoding STB market across American and Asian cable networks that utilize the ITU-T J.83 annex B physical layer. It is suitable both for operator (with advanced security) and retail markets.

The STiH223 provides a solution for operators and manufacturers to specify a range of cost-effective, high performance STBs, including basic zappers, interactive STBs, and DVR STBs with content delivery possible using broadcast or broadband networks or both (hybrid STBs).

The STiH223 integrates a high performance cable receiver, supporting reception, channel demodulation, and forward error correction (FEC) and is fully compliant with the ITU-T J.83 annex B standard.

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Errata Sheet
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Data Brief

Key Features

  • ST40 applications CPU with 256 KB L2 cache
  • 16-bit LMI supporting DDR2/DDR3
  • Decoding of H264, MPEG2, VC-1 and AVS HD video streams
  • 3DTV decoding and display compatible with HDMI 1.4a
  • Extensive connectivity (2 × USB 2.0 ports; Ethernet MII/RMII/TMII port; SD/MMC card port; eSATA port; PCI-e)
  • Secure boot from SLC NAND Flash or Serial NOR Flash; eMMC booting option
  • Low-power process and architecture
  • Integrated low power standby controller
  • High-quality video resizing and de-interlacing
  • Integrated Ethernet PHY
  • Targets two layer PCBs for cost-effective zapper STB applications
  • Integrates ITU-T J.83 annex B demodulation and FEC

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Technical Documentation

Product Specifications

描述 版本 大小
DB1581: HD cable STB processor with integrated demodulator and low power standby controller
1.0 80 KB

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