Power dissipation and cooling methods

This section provides recommendations for efficient thermal analysis on STM32 applications, focusing on the following points:

power dissipation and its variation with factors named PVTA (process, voltage, (junction) temperature, and activity)
how to minimize the power consumption
how to optimize the thermal dissipation

Power dissipation

There are two types of current consumed by the device:

The static current: also called leakage current, depends on the process, voltage, and junction temperature but does not depend on the activity
The dynamic current: depends on the process, voltage, and activity but does not depend on the junction temperature (at least in first approximation).

The static/leakage current grows exponentially with the junction temperature (while the dynamic current does not significantly change).

Therefore, the total current can be written as follows:

I_{T o t a l} (P, V, T_{j}, a c t i v i t y) = I_{s t a t i c} (P, V, T_{j}) + I_{D y n a m i c} (P, V, a c t i v i t y)

The dissipated power varies with PVTA conditions. It is calculated as the product of the voltage generated across the device and the (average) current consumed.

The junction temperature increase above the ambient temperature is calculated as a product of the dissipated power and the junction-to-room thermal resistance.

The junction temperature must be kept lower than the maximum target given by the following equation:

T_{j} = T_{r o o m} + P_{d i s s} \times T h e t a_j_r o o m < T_{j_\max}

Important:

In this simplified formula used only for didactic purpose, Theta_j_room is a complex coefficient that is not a device characteristic but a system one (device + other components + boards + casing).

The following methods to keep the junction temperature below the ambient temperature are detailed in the next sections:

Limiting Pdiss
Limiting Theta_j_room (cooling system, host board and casing design)

Minimizing power consumption (Pdiss)

To reduce the power consumption, the first action is to reduce the supply voltage. Some STM32 devices offer a multipower domain architecture that allows the different power domains to be set in low-power mode. The goal is to optimize the power efficiency (see the corresponding datasheets for more details).

The power consumption profile also varies with the application. Some applications are most of the time in idle mode, working on full or limited capacity only when an event occurs. Some others demand a regular workload.

For these various power profiles, the user programmer enables the low-power modes by software.

The most common available modes are listed below:

Power gating: reduces power consumption by shutting off the current to a part of the circuit that is not in use.
Clock gatings: reduces dynamic power dissipation by shutting down clocks to a circuit or portion of the clock tree.
Dynamic voltage scaling: power management technique where the voltage is increased or decreased, depending upon circumstances.
Dynamic frequency scaling (also known as throttling when applied to a CPU): frequency automatically adjusted on-the-fly depending on the actual needs, to conserve power and reduce the amount of heat generated.

All these modes are available, for example, on STM32H7 and STM32MP1 series devices (see the reference manuals for more details).

Power dissipation variation with junction temperature

In this section, process, voltage, and activity factors are kept constant, and there is a focus on the effect of the junction temperature.

The static/leakage current grows exponentially with the junction temperature (while the dynamic current does not significantly change).

The power dissipation variation with junction temperature has the following main consequences:

A cooling solution must be implemented to limit the junction temperature below 125 °C (maximum junction temperature).
If the cooling system is not efficient enough, the device can go into thermal runaway that may be destructive.

When performing system-level thermal simulations in the design phase, it is fundamental to input junction temperature dependent power dissipation.

Risk of thermal runaway

The junction-to-room temperature thermal resistance, Theta_j_room, characterizes the cooling system of a design.

This thermal resistance gives the capability to dissipate power in the design while limiting the junction temperature.

The following equation gives the heat dissipation capability (HDC):

H D C = (T_{j} - T_{r o o m}) / (T h e t a_j_r o o m)

Figure 3. HDC (heat dissipation capability)

Case 1

The figure below shows the operating point at the intersection of the curve of the power that can be dissipated inside the design at a given T_J (HDC) and the curve of the power effectively dissipated inside the design (Pdiss).

Case 2

The figure below shows the effect of an increased room temperature (without changing any other factors).

Case 3

The figure below shows the effect of an increased junction-to-room thermal resistance (without changing any other factors).

The two curves in case 2 and case 3 do not intersect. For this reason, no stable operating point is defined. This is a condition of thermal runaway.

Case 4

The figure below shows the effect of a decrease in power dissipation (without changing any other factors).

Cooling

Power dissipation paths

The power dissipated by the die is extracted along the two following main paths:

top side: power dissipated from the top side, (by a heat sink through an optional TIM, thermal interface material)
bottom side: power dissipated from the bottom side by the PCB, (by bottom metal plate through an optional TIM)

Main cooling methods

The heat sink and the PCB dissipate the power to the surrounding environment by the convection and radiation methods.

Natural convection

The term ‘natural convection’ is used when no fan is used in the casing. This cooling method is a combination of natural convection and radiation that always work in parallel.

Forced convection

The term ‘forced convection’ is used when a fan is used in the casing.

Natural and forced convection comparison

The table below details the main comparison factors between the natural and forced convection.

Table 3. Natural and forced convection comparison
Comparison factors	Natural convection	Forced convection
Cooling efficiency	Low	Medium to high (depending on air speed)
Cost	Low (no fan)	Higher (cost of the fan)
Reliability	Higher (no moving parts)	Lower (mechanical part moving)
Acoustic noise	None	Small to medium (depending on air speed)
Possibility to control cooling efficiency based on needs	None	Yes, by varying fan voltage