| Author | beginning argument ( Replies received: 3 ) |
| bobz |
 Posted 04-09-2008 at 20:02 |
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The stm32f10xxx reference revision 5 page 37 section 2.3.3 'Bit-Banding' paragraph 2 says;-
"In the STM32f10xxx both peripheral registers and the SRAM are mapped in a bit-band region"
but there is no mention where the alias region begins for the peripheral registers. The ST, ARM and code documentation/examples only give it for the SRAM (casually as 0x22000000).Please can someone tell me the address and where it is documented?
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| lanchon |
 Posted 04-09-2008 at 23:30 |
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check PERIPH_BB_BASE (and PERIPH_BASE) in the fwlib header files and see the macros here for context:
http://www.st.com/mcu/forums-cat-6567-23.html
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| bobz |
Posted 05-09-2008 at 00:36 |
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Thankyou Lanchon.
http://www.arm.com/support/faqdev/15921.html answers my question perfectly.
#define BITBAND_SRAM_REF 0x20000000
#define BITBAND_SRAM_BASE 0x22000000
#define BITBAND_SRAM(addr,bit) ((BITBAND_SRAM_BASE + (addr-BITBAND_SRAM_REF)*32 + (bit*4)))
#define BITBAND_PERI_REF 0x40000000
#define BITBAND_PERI_BASE 0x42000000
#define BITBAND_PERI(addr,bit) ((BITBAND_PERI_BASE + (addr-BITBAND_PERI_REF)*32 + (bit*4)))
I expected to see the alias areas at 0x22000000 and 0x42000000 in the ST datasheet memory maps.
Actually this address information is in the Cortex M3 Technical Reference Section 4.1 About the Memory Map.
[ This message was edited by: bobz on 07-09-2008 23:50 ]
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| lanchon |
Posted 05-09-2008 at 06:42 |
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as a matter of taste, I prefer to use these macros
#include "stm32f10x_lib.h"
#define BB_BIT(REGISTER, BIT_NUMBER, BASE, BB_BASE) \
((volatile s32*) ((BB_BASE) + (((u32) &(REGISTER)) - (BASE)) * 32 + (BIT_NUMBER) * 4))
#define PERIPHERAL_BIT(REGISTER, BIT_NUMBER) \
BB_BIT(REGISTER, BIT_NUMBER, PERIPH_BASE, PERIPH_BB_BASE)
#define SRAM_BIT(REGISTER, BIT_NUMBER) \
BB_BIT(REGISTER, BIT_NUMBER, SRAM_BASE, SRAM_BB_BASE)
#define MY_LED PERIPHERAL_BIT(GPIOC->ODR, 12)
// *MY_LED = 1;
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bit-banding: base address for peripheral registers alias area?