Embedded application aspects

This section provides advice on how to overcome software limitations in embedded applications and how to fulfill the needs of different applications.

Data retention

The flash memory data retention is typically 30 years at 85°C after cycling 1000 times (refer to the STM32 product datasheet for more information). Nothing specific is done in the EEPROM emulation driver to increase the EEPROM data retention. However, when a page transfer is initiated, all data (including long-lived data) is copied to a new flash memory page. This ensures an EEPROM data retention significantly higher than the original flash memory data retention.

Detecting flash memory operations interrupted by a reset on STM32U5 devices

The STM32U5 series FLASH_OPSR register indicates whether a flash memory operation was interrupted by a reset or not.

Note:

The current X-CUBE-EEPROM release does not use this register.

In association with power-failure detection (see Detecting power failures), this allows the EE_Init function to be called with the EE_CONDITIONAL_ERASE parameter, avoiding the need to use the EE_FORCE_ERASE parameter.

Additionally, the current EEPROM emulation erases the flash memory first empty line after each reset. This operation is avoided by using of the FLASH_OPSR register.

Detecting power failures

If no asynchronous reset can be generated by the application, the only way to corrupt the flash memory programming, or erasing operations is the case of power failure. The application can use the PVD not to generate a flash memory write or erase operation during the VDD ramp down. An example of this PVD (programmable voltage detector) usage is provided in the EEPROM example main application.

The decoupling capacitors or battery must be sized to provide enough power to the chip during the full write or erase operation and before the supply voltage goes below 1.7 V (minimal operating voltage) or before a BOR (brownout reset) is generated. In this case, the EE_CONDITIONAL_ERASE parameter of the EE_Init routine can be used. In all other cases, the EE_FORCE_ERASE parameter has to be used.

Note:

PVD is not available on STM32C0 series.

Reducing worst case access times

An EEPROM read command consists of performing flash memory reads from the highest to the lowest address in the ACTIVE and VALID pages. If the data to retrieve was the first to be written, this process can be quite long. Similarly, the page transfer searches for all virtual addresses used during EEPROM emulation and looks for corresponding data values. These read and transfer times can be quite long when the size of emulated EEPROM is large.

The worst-case read and write access times can be reduced by implementing a LUT (look up table) storing the element values in RAM. Although implementing a LUT does not affect the typical access times and is quite costly in terms of RAM space, it can still be an option implemented in a future revision of the EEPROM emulation driver.

Conclusion

The STM32 devices internal flash memory can be used advantageously in many applications to emulate an EEPROM. Even though the memory characteristics are quite different, this application note has shown that emulated EEPROM competes with real EEPROM in terms of:

Memory size
Read and write access times
Driver usage simplicity and flexibility
Memory endurance
Data retention
Robustness to asynchronous resets and power failures
Reliability
Cost by removing the need for an external component

Revision history

Table 11. Document revision history
Date	Version	Changes
11-Jul-2017	1	Initial release.
20-Sep-2018	2	Updated document to scope STM32L4 and STM32L4+ series devices. Updated: Figure 1: Page status evolution Figure 2: Page status valid transitions Section 3.3: Page and variable format Figure 3: Flash page and EEPROM variable format (except STM32U5 series) Section 4.4: Cycling capability: EEPROM endurance improvement Table 7: Flash usage for a 4000-byte emulated EEPROM (STM32L4/L4+) Section : As a consequence, the application code is not executed and interrupts cannot be served during a maximum time equal to the longest page-erase operation duration for your STM32 product (see the applicable datasheet). This behavior may be acceptable for many applications, however for applications with real-time constraints, the user needs to take corrective action. Section 5.1.3: User defines Section 5.2: EEPROM emulation memory footprint Section 5.3: EEPROM emulation timing Added Section 4.6: Computing the required size of flash memory for EEPROM emulation.
01-Jun-2020	3	Updated: Document title Introduction Section 3.3: Page and variable format and Table 4: Flash memory properties Section 3.4: Simple use case Section 4.4: Cycling capability: EEPROM endurance improvement and Table 6: Flash memory endurance Section 4.6: Computing the required size of flash memory for EEPROM emulation Section 4.7.1: Data recovery Section 4.8.3: Dual core considerations Section 5.1.1: Key features Section 5.1.2: STM32Cube expansion software (X-CUBEEEPROM), Figure 6: Directory tree, and Table 8: Boards covered Section 5.1.3: User defines Section 5.1.4: User API definition and Table 9: API definition Section 5.2: EEPROM emulation memory footprint and Table 10: Memory footprint for EEPROM emulation mechanism Section 5.3: EEPROM emulation timing and Table 11: EEPROM emulation timings for different targets.
03-Nov-2020	4	Extended document scope to STM32WL series. Updated: Introduction Table 1: Applicable products Table 4: Flash memory properties Table 6: Flash memory endurance Table 8: Boards covered Added Section 4.10: Cache coherency maintenance.
16-Dec-2021	5	Extended document scope to STM32U5 series. Updated: Introduction Section 3.1: Principle Section 3.3: Page and variable format Section 3.3: Page and variable format Section 4.1: Data granularity management Section 4.7.1: Data recovery Section 5.1.1: Key features Section 5.1.2: STM32Cube expansion software (X-CUBEEEPROM) Table 6: Directory tree Section 5.1.3: User defines Section 5.3: EEPROM emulation timing Table 9: API definition Table 10: Memory footprint for EEPROM emulation mechanism Table 11: EEPROM emulation timings for different targets Added Section : The flash memory data retention is typically 30 years at 85°C after cycling 1000 times (refer to the STM32 product datasheet for more information). Nothing specific is done in the EEPROM emulation driver to increase the EEPROM data retention. However, when a page transfer is initiated, all data (including longlived data) is copied to a new flash memory page. This ensures an EEPROM data retention significantly higher than the original flash memory data retention.. Differentiated Flash memory page sizes between STM32WB55xx and STM32WB15xx series in Table 4: Flash memory properties.
12-Jan-2023	6	Updated: Table 1: Applicable products Table 4: Flash memory properties Table 6: Flash memory endurance Table 8: Boards covered Table 10: Memory footprint for EEPROM emulation mechanism Table 11: EEPROM emulation timings for different targets Figure 6: Directory tree Section 6.3: Detecting power failures Added Section : The flash memory data retention is typically 30 years at 85°C after cycling 1000 times (refer to the STM32 product datasheet for more information). Nothing specific is done in the EEPROM emulation driver to increase the EEPROM data retention. However, when a page transfer is initiated, all data (including longlived data) is copied to a new flash memory page. This ensures an EEPROM data retention significantly higher than the original flash memory data retention.
18-Jul-2023	7	Updated: Document title Section : Introduction Table 1: Applicable products Table 4: Flash memory properties Section 4.1: Data granularity management Table 6: Flash memory endurance Section 5.1.1: Key features Table 8: Boards covered Table 10: Memory footprint for EEPROM emulation mechanism Table 5.3: EEPROM emulation timing Table 11: EEPROM emulation timings for different targets Added Section 4.5: High-cycle data area of flash memory
25-Sep-2023	8	Updated Table 11: EEPROM emulation timings for different targets
15-Mar-2024	9	Extended document scope to STM32U0 series.
13-Mar-2025	10	Extended document scope to STM32U3 series.
18-Mar-2025	11	Updated Table 3 Flash memory properties.
06-Jul-2026	12	Extended document scope to NUCLEO‑WL33CC1 and updated General information.