Supported devices

To know if a CMOS sensor (a camera module) is compatible with the DCMI or not, the user must check the following points in the CMOS sensor specifications:

Parallel interface (8-, 10-, 12-, or 14-bit)
Control signals (VSYNC, HSYNC, and PIXCLK)
Supported pixel clock frequency output
Supported data output

There is a wide range of camera modules and CMOS sensors that are compatible with the STM32 DCMI. The table below lists some of them.

Table 15. Examples of supported camera modules
CMOS sensor	Camera module	Formats	Parallel interface
MT9D111	ArduCAM 2 megapixels	RGB, YCbCr, JPEG	10-bit
MT9P111	5 megapixels	RGB, YCbCr, JPEG	8-bit
NT99141	ArduCAM 1 megapixel	RGB, YCbCr, JPEG	8-bit
OV2640	ArduCAM 2 megapixels	RGB, YCbCr, JPEG	8-bit, 10-bit
OV3660	3 megapixels	RGB, YCbCr	8-bit, 10-bit
OV5640	ArduCAM 5 megapixels	RGB, YCbCr, JPEG	8-bit, 10-bit
OV5642	ArduCAM 5 megapixels	RGB, YCbCr, JPEG	8-bit, 10-bit
OV9655	ArduCAM 1.3 megapixels	RGB, YCbCr	8-bit
S5k4ECGX	5 megapixels	RGB, JPEG	10-bit
S5k5CAGA	3 megapixels	RGB, JPEG	10-bit

Conclusion

The DCMI represents an efficient interface to connect the camera modules to the STM32 MCUs supporting high speed, high resolutions, and a variety of data formats/widths.

Together with the variety of peripherals and interfaces integrated in STM32 MCUs and benefiting from the STM32 smart architecture, the DCMI can be used in large and sophisticated imaging applications.

This application note covers the DCMI across the STM32 MCUs, providing all the necessary information to correctly use the DCMI, and to succeed in implementing applications starting from the compatible camera module selection to detailed examples implementation.

Revision history

Table 16. Document revision history
Date	Version	Changes
3-Aug-2017	1	Initial release.
17-Oct-2022	2	Updated: Table 1 Table 2. DCMI and related resources availability DCMI in a smart architecture with all new products Table 6 DCMI and camera modules on STM32 boards YCbCr, Y only Image resizing (resolution modification) Table 7 DCMI operation in low-power modes DMA configuration for DCMI-to-memory transfers Table 8 DMA stream selection across STM32 devices DMA_SxNDTR/DMA_CNDTRx/GPDMA_CxBR1 register Table 13 Maximum data flow at maximum DCMI_PIXCLK Table 14 STM32Cube DCMI examples Configuration of common examples Table 15 Examples of supported camera modules
24-Feb-2023	3	Updated: Table 1 Table 2. DCMI and related resources availability Figure 7 DCMI slave AHB2 peripheral in the STM32F4 Figure 8 DCMI slave AHB2 peripheral in the STM32F7 Figure 9 DCMI slave AHB2 peripheral in the STM32H723/733, STM32H743/753, STM32H742, STM32H725/735, STM32H730, and STM32H750 devices Figure 10 DCMI slave AHB2 peripheral in the STM32H745/755 and STM32H747/757 devices Figure 11 DCMI slave AHB2 peripheral in the STM32H7A3/B3 Figure 12 DCMI slave AHB2 peripheral in STM32L496/4A6 Figure 13 DCMI slave AHB2 peripheral in the STM32L4+ Table 6 DCMI and camera modules on STM32 boards Figure 17 DCMI block diagram: example of 12-bit data width DMA configuration Table 9 DMA stream selection across STM32 devices Table 13 Maximum data flow at maximum DCMI_PIXCLK STM32H7A3/7B3 devices Added: STM32H5 system architecture STM32U5 system architecture
20-Nov-2024	4	Document updated to add STM32H523/533 and STM32N647/657 lines to the scope of this document. Updated: Table 1: add new products in the scope of the document Basic imaging concepts: title updated, and typos corrected inside the section DCMI availability and features across STM32 MCUs: Table 2 Availability of DCMI and related resources DCMI in a smart architecture STM32H7x3, STM32H742, STM32H725/735, STM32H730, and STM32H750 devices STM32L4 system architecture STM32L4+ system architecture including Figure 13 DCMI slave AHB2 peripheral in the STM32L4+ STM32U5 system architecture STM32H5 system architecture CMOS sensors for STM32H7B3I-EVAL and STM32U575I-EVAL in Table 6 DCMI and camera modules on STM32 boards Figure 17 DCMI block diagram: example of 12-bit data width Data formats and storage YCbCr, Y only Image resizing (resolution modification) Table 7 DCMI operation in low-power modes DMA configuration DMA configuration for DCMI-to-memory transfers DCMI channel and stream configuration including Table 9 DMA stream selection across STM32 devices FIFO and burst transfer configuration Circular mode for low resolution in continuous capture Double-buffer mode for medium resolutions (snapshot or continuous capture) Performance DCMI use cases Added: STM32N6 system architecture