AN5156 · Application noteIntroduction to security for STM32 MCUs
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MAC or signature and certificate

MAC or signature and certificate

MAC and signature

The message authentication code (MAC) and the signature add authentication to integrity by encrypting the message hash. The difference between MAC and signature is that the MAC generation uses a symmetric key algorithm (Figure 19 MAC generation with secrete key algorithm), while the signature uses the message sender private key (Figure 20 Signature generation with public key algorithm).

The signature adds non-repudiation dimension to authentication:
  • A private key is not supposed to be revoked (its lifetime goes beyond the transfer operation), while a secret key may have a limited lifetime (limited to this transfer).
  • The private key used for signature is never shared, its security is higher than a secrete key.
Figure 19. MAC generation with secrete key algorithm
Figure 20. Signature generation with public key algorithm

Certificate

A certificate is related to public key algorithms. It authenticates the public key in an asymmetric transfer. It is used to counteract usurpation by an attacker that substitutes the right public key by his own key. A certificate consists in the public key signed by a certificate authority (CA) private key. This CA is considered as fully trusted.

In addition to the public key, the certificate also contains version numbers, validity period and some IDs.

Revision history

Table 19. Document revision history
DateVersionChanges
17-Oct-20181Initial release.
25-Feb-20192Updated:
  • Table 1. Applicable products
  • Section 1 General information
  • Table 11. Security features for STM32H7, STM32G0, STM32G4 and STM32WB Series
  • Figure 9. Example of RDP protections (STM32L4 Series)
  • Section 6.6 Firewall
Added:
  • Section 6.8 Cryptographic key storage (CKS)
7-Oct-20193Updated:
  • Table 1. Applicable products
  • Section "Introduction" renamed "Overview"
  • Table 2. Glossary
  • Section "Hardware protections" renamed "Device protections"
  • Figure 4. Memory types
  • Table 5. Memory types and associated protection
  • Section 4.2.4 External Flash memories
  • Table 6. Scope of STM32 embedded memories protection features
  • Table 7. Software isolation mechanism
  • Section 4.5 Boot protection
  • Section 5 Secure applications: Table 9, Table 10 and Table 11
  • Section 6.2 Readout protection (RDP)
  • Section 6.7 Secure hide protection (HDP)
  • Section 6.17 Cryptography
  • Section 7 Guidelines
  • Some colors removed on all figures

Added:

  • Section 4.1 TrustZone® for Armv8-M architecture
  • Section 6.4 TrustZone
  • Section 6.18 On-the-fly decryption engine (OTFDEC)
21-Feb-20204
  • Updated Section Introduction
  • Added acronyms in Table 2. Glossary
  • Updated Section 2 Overview and Section 3 Attack types
  • Restructured Section 3.4 IoT system attack examples (added Section 3.5 List of attack targets)
  • Updated Section 4 Device protections
  • Updated and restructured Section 5 Secure applications
  • Added Section 5.3 Arm TF-M solution
  • Updated Section 6 STM32 security features, Section 7 Guidelines and Section 8 Conclusion
06-Nov-20205Updated:
  • Document's scope to add STM32WL Series
  • Table 1. Applicable products
  • Section 1 General information
  • Section 3.1 Introduction to attack types
  • Section 3.2 Software attacks
  • Section 3.3.1 Non-invasive attacks
06-Nov-2020 5 (cont'd)
Updated:
  • Section 3.3.2 Silicon invasive attacks
  • Section 4.1 TrustZone® for Armv8-M architecture
  • Table 5. Memory types and associated protection
  • Section 5.3 Arm TF-M solution
  • Table 8. Basic feature differences
  • Section 6.1 Security features overview including updates in all the tables
  • Section 6.2 Readout protection (RDP)
  • Section 6.4 TrustZone
Added:
  • Section 4.2 Dual-core security
  • Section 6.3 One-time programmable (OTP)
07-Jul-20216Updated:
  • Document's scope to add STM32U5 Series
  • Table 1. Applicable products
  • Section 3.3.1 Non-invasive attacks
  • Section 4.3.3 Embedded SRAM
  • Section 4.3.4 External Flash memories
  • Section 5 Secure applications
  • Table 9. Security features for STM32Fx Series
  • Table 10. Security features for STM32Lx and STM32U5 Series
  • Table 11. Security features for STM32H7, STM32G0, STM32G4, STM32WB and STM32WL Series
  • Section 6.3 One-time programmable (OTP)
  • Section 6.6 Execute-only firmware (PCROP)
  • Section 6.8 Firewall
  • Section 6.9 Memory protection unit (MPU)
  • Section 6.17 Cryptography
  • Section 6.17.1 Hardware accelerators
  • Section 6.17.2 CryptoLib software library
Added:
  • Section 5.4 Product certifications
13-Jan-20237

Updated:

  • Document scope to add STM32C0 and STM32H5 Series
  • Section 1 General information
  • Debug port access and SCA in Section 3.3.1 Non-invasive attacks
  • Random number generation and Communication eavesdrop in Section 3.5 List of attack targets
  • New Section 4.1 Configuration protection
  • Introduction of Section 5.2 ST proprietary SBSFU solution
  • New Section 5.2.3 Configurations
  • Section 5.3 Arm TF-M solution
  • Section 6.1 Overview of security features
  • Last note in Section 6.2 Readout protection (RDP)
  • New Section 6.3 Lifecycle management – product state
  • Section 6.7 Execute-only firmware (PCROP)
22-Mar-20238Updated:
  • Section 1 General information
  • Section 4.1 Configuration protection
  • Section 4.2 TrustZone® for Armv8-M architecture
  • Table 6. Scope of STM32 embedded memory protection features
  • Table 7. Software isolation mechanism
  • Section 5.4 Arm TF-M solution
  • Section 5.5 Product certifications
  • Table 9. Security features for STM32C0, STM32F0/1/2/3/4, STM32G0/4 devices
  • Section 6.2 Readout protection (RDP)
  • Section 6.5 TrustZone®
  • Section 6.7 Execute-only firmware (PCROP)
  • Section 6.12 Antitamper (TAMP)/backup registers (BKP)
  • Section 6.18 Cryptography
  • Section 7 Guidelines
  • Section 8 Conclusion
Added:
  • Section 5.1 Secure firmware install (SFI)
13-Oct-20239Updated:

  • Table 4. Attacks types and costs

  • Section 5.6: Product certifications

  • Section 6.3: Lifecycle management–product state

  • Section 6.9: Secure hide protection (HDP)

  • STM32WBA added to Table 11. Security features for STM32L0/1/4/4+, STM32WB, STM32WBA, STM32WL devices

  • STM32H7R/S added to Table 12. Security features for STM32L5, STM32U5, STM32H503/

Added:
  • Section 5.5: Secure manager
11-Mar-202410Updated:
  • Document title from Introduction to STM32 microcontrollers security to Introduction to security for STM32 MCUs.
  • Added STM32U0 Series and STM32WB0 Series to the document scope and updated Table 1. Applicable products..
  • Added footnotes to Hardware crypto row on Table 10, Table 11 and Table 13.
  • Table 11: added STM32WB0x column.
  • Table 13: table header, RNG row, added STM32U0 column.
  • RDP level regression..
  • Section 6.3: Lifecycle management–product state: main available product states list.
  • Section 6.9: Secure hide protection (HDP) inlcuding Figure 10. HDP protected firmware access.
  • Note on When to use the firewall.
  • Section 6.20.1: Hardware accelerators: added note.
Added:
  • Regression locked by OEM keys
  • Section 6.4: Unique boot entry
10-Feb-202511
Updated:
  • Section 1: General information
  • Section 4.2: TrustZone® for Armv8-M architecture
  • Section 4.4: Memory protections
  • Section 4.4.1: System flash memory
  • Section 4.4.4: External flash memories
  • Section 4.4.5: STM32 memory protections
  • Section 4.6: Debug port and other interface protection
  • Section 4.7: Boot protection
  • Section 5.1: Secure firmware install (SFI)
  • Section 5.4: Arm TF-M solution
  • Section 5.6: Product certifications
  • Section 6.8: Flash memory write protection (WRP)
  • Section 6.10: Secure hide protection (HDP)
  • Section 6.24: Memory crypto engine (MCE)
Added:
  • STM32WL3 product line, STM32U3 series, STM32N6 series
  • Section 6.6: Boot and security control (BSEC)
  • Section 6.11: Firewall
  • Section 6.15: Option byte keys (OBK)
  • Section 6.24: Memory crypto engine (MCE)
20-May-202512

Added STM32C5 in the Table 1.

Updated Product certifications.

Added STM32C5 column in the Table 10 Security features for STM32C0/5, STM32F0/1/2/3/4, STM32G0/4 devices and updated Readout protection (RDP).

Added "ST restricted" watermark.

19-Feb-202613

Updated:

Added RAM and integrity secure area firewall (RISAF).

24-Jun-202614
Updated:
Added:

Removed section 6.23.1: Hardware accelerators