STM32L5 API and reference clock detection…

STM32L5 API and reference clock detection application example

STM32CubeL5 firmware libraries are the same as in STM32CubeL5 firmware libraries for smooth calibration application.

X-CUBE-RTC for reference clock detection application

X-CUBE-RTC shows an implementation of the reference clock detection (STM32CubeExpansion_AN4759_RTC_STM32L_Vx.y.z\Projects\NUCLEO-L552ZE-Q\RTC_RefClockDetection).

The firmware implements:

TIM1 in Master mode with update interrupt activated to generate an interruption each second. It is configured to use the HSI clock through a PLL to be clocked by a 100 MHz signal (HSI is less precise than the LSE clocking the RTC but allows the measure of the RTC period without the need to inject another signal than the 50/60 Hz one).
the RTC with the activation of the reference clock detection feature
GPIO: RTC_OUT CALIB (PB2) to check if the RTC 1 Hz output frequency is really 1 Hz. The user LED2 (PB7) to visualize the 1-second period and the good working of the application. The RTC_REFIN pin (PB15) to host the 50/60 Hz signal used as the reference clock detected.

Reference clock detection application example

Hardware setup

In order to use the application example project, the user needs a STM32L552ZE-Q Nucleo board (NUCLEO‑L552ZE-Q). Supply the board using the USB cable.

As indicated by the application name, a reference clock must be delivered to the STM32 for this application. For this goal, the user has to take a 50/60 Hz signal more precise than the LSE clock of the Nucleo board, and to inject it on the PB15 pin (position 26 on CN12 of the Nucleo board).

The user can check that the RTC prescalers are well configured for the board by verifying a 1 Hz signal is output on PB2 (RTC_OUT CALIB output).

Software setup

Open the project under the user favorite IDE. For IAR Embedded Workbench, open the RTC_Synchronization.eww file. For MDK-ARM, open the RTC_Synchronization.uvprojx file. For STM32CubeIDE, open the .cproject file.

Compile and launch the debug session. It loads the program in the internal Flash memory and executes it.

Reference clock detection principle

This application performs the following steps:

TIM1 is configured and launched to generate an interruption each second (APB2 timer clock = 100 MHz).
RTC is configured and launched including its calendar and reference clock detection feature (RTC clock = LSE).
When the 50/60 Hz signal is available on PB15, the RTC automatically aligns the rising edges of this reference clock with the ones of the output of the synchronous RTC prescaler (1 Hz clock). Thus, the RTC 1 Hz clock is synchronized with the signal provided by the user.
The 1-second period counted by the TIM1 interruptions allows the measure of the RTC period. The HSI (TIM1 clock source) is less precise than the LSE (RTC clock source). The LSE is synchronized with an even more precised reference clock by the way. Thus, this measure is made for testing the application.

The reference clock detection and synchronization are continuous. If the reference is lost, the RTC is still clocked by LSE.

Run time observations

The following steps are needed to check the correct functionality:

Set the CLK_REF_ACTIVATED to 0 and observe the time_elapsed variable deriving (getting away from 255/1 s). The user can monitor it in Debug mode.
Set the CLK_REF _ACTIVATED to 1 and observe that the time_elapsed variable derivation is less important.

time_elapsed embodies the 1-second period measured for RTC.

Note:

A typical quartz has an uncertainty of 53 s/month. This uncertainty must be attenuated with the reference clock detection and synchronization.

Moreover, to check that the application runs properly, the user can also visualize the user LED2 blinking each second and the RTC_OUT CALIB output on PB2 pin (these two observations do not witness the efficiency of the reference synchronization).

STM32L5 API and internal tamper detection application example

X-CUBE-RTC for internal tamper detection application

X-CUBE-RTC shows an implementation of the internal tamper detection in the folder:

STM32CubeExpansion_AN4759_RTC_STM32L_Vx.y.z\Projects\NUCLEO-L552ZE‑Q \RTC_InternalTamperCalOvf

This example uses the RTC firmware driver API mentioned in STM32L5 API and smooth digital calibration application example and STM32L5 API and synchronization application example. It is developed for the NUCLEO-L552ZE-Q board and exploits the ITAMP5 signal associated to a RTC calendar overflow event.

The user must supply the Nucleo board via USB, then compile and run the firmware with the preferred IDE. For IAR Embedded Workbench, open the RTC_Synchronization.eww file. For MDK-ARM, open the RTC_Synchronization.uvprojx file. For STM32CubeIDE, open the .cproject file.

The X-CUBE-RTC simply configures the RTC calendar at 23:59:30 on the 31st of December of the year xx99 and activates the internal tamper 5. The user can choose the polling mode or interrupt mode with the ITAMP_INTERRUPT constant in main.h: 1 is interrupt mode, 0 is polling mode.

When the seconds pass 59, the internal tamper event occurs and the green user led 1 PC7 if in polling mode, or the blue user LED2 PB7 if in interrupt mode, is turned on.

RTC_DR and RTC_TR allow the contents of the RTC calendar to be observed in debug mode.

The user can easily modify this example to exploit all the others internal tamper event sources.

Revision history

Table 22. Document revision history
Date	Version	Changes
26-May-2016	1	Initial release.
25-Oct-2016	2	Updated: Table 1: Applicable products adding product series and part number. Figure 3: STM32F2, STM32F4, STM32L0 and STM32L1 Series RTC clock sources. Figure 4: STM32F0, STM32F3, STM32F7, STM32L4 and STM32WB Series RTC clock sources Table 3: Calendar clock equal to 1 Hz with different clock sources Section 1.4: Digital smooth calibration adding the RTC calibration basics Table 14: Advanced RTC features Section 4.3.3: LED meaning new Section 5: STM32L4 API and digital smooth calibration application example Section 6.3.1: Hardware setup Section 6.3.2: Software setup Section 7: Reference documentation
11-May-2017	3	Updated: Figure 4: STM32F0, STM32F3, STM32F7, STM32L4 and STM32WB Series RTC clock sources Table 3: Calendar clock equal to 1 Hz with different clock sources adding note Section 1.4.1: RTC calibration basics Section 1.11.1: RTC register write protection Table 14: Advanced RTC features RTC calibration for STM32F2 Series
11-Feb-2019	4	Updated: Table 1 with the STM32WB Series Section 1: Overview of the STM32 MCUs advanced RTC Figure 4: STM32F0, STM32F3, STM32F7, STM32L4 and STM32WB Series RTC clock sources Advanced RTC features table Removed Section 7. Reference documentation.
12-Feb-2020	5	Updated: Introduction Table 1: Applicable products Section 1: Overview of the STM32 MCUs advanced RTC: new Table 2: RTC/TAMP types versus features and new Table 3: RTC type versus STM32 products Table 4: Advanced RTC2 features new Table 5: Advanced RTC3 features Table 6: Steps to initialize the calendar Footnote Table 7: Calendar clock equal to 1 Hz with different clock sources Section 2.1.4: RTC clock configuration Table 8: Steps to configure the alarm Section 2.3.2: Alarm sub-second configuration Section 2.4: RTC periodic wakeup unit Table 11: Steps to configure the auto-wakeup unit Section 2.5.2: Methodology paragraph and Figure 10: Smooth calibration block for RTC3 with LPCAL=1 Section 2.9: Timestamp function Section 2.10: RTC tamper detection function Section 2.11: Backup registers Section 2.12: Alternate function RTC outputs Section 2.13: RTC safety aspects Section 2.14: Reducing power consumption
12-Feb-2020 (cont'd)	5	Added: Section 2.1.5: Calendar firmware examples Section 2.4.3: Wakeup firmware examples Section 2.8: RTC prescaler adjustment with LSI measurements Section 2.10.4: Active tamper detection (RTC3 only) Figure 17: Tamper detection Section 2.10.7: Tamper detection firmware examples Section 6: STM32L5 API and digital smooth calibration application example Section 7: STM32L5 API and synchronization application example Section 8: STM32L5 API and reference clock detection application example Section 9: STM32L5 API and internal tamper detection application example
4-Jun-2021	6	Updated with the STM32U5 Series: Introduction Table 2. RTC/TAMP types Table 3. RTC type on STM32 MCUs STM32H7 in Table 4. Advanced features for RTC2 type STM32U5 in Table 5. Advanced features of RTC3 type Notes in Figure 1. RTC calendar fields Example in Section 2.3.1.2 Configure the alarm behavior using the MSKx bits Note in Section 2.3.2 Alarm subsecond configuration Note in Section 2.4.2.3 Periodic timebase/wakeup configuration for clock configuration 3 Caution in Section 2.6 Synchronize the RTC Section 2.10.3 Action on tamper detection event Section 2.10.5 Internal tamper detection (RTC3 only) Section 2.11 Backup registers Section 2.13.2 Enter/exit initialization mode Titles and structure of to Section 3 to Section 9 Added: Section 2.2 Binary and mixed modes (RTC3 only) Section 2.10.6 Potential detection management (RTC3 only)
20-Sep-2021	7	Updated: Calendar firmware examples Figure 9 Smooth calibration block for RTC2 type
08-Nov-2022	8	Updated: Introduction to add the STM32C0 and the STM32H5 Series. Advanced RTC features to add data for STM32U5, STM32L5, STM32L41/42/4P5/4Q5, STM32G4, STM32G0, STM32H7A3/7B3, STM32H5 and STM32C0 in Table 5. Advanced features of RTC3 type. Internal tamper detection (RTC3 only) to update the internal tamper list. Tamper detection firmware examples Low-power management firmware examples
12-Mar-2024	9	Updated: Document title Table 1 Table 3 RTC type on STM32 MCUs Table 4 Advanced features for RTC2 type AN4759_Adv-RTC-features.html#id_33173__table_hqc_shf_rpb RTC clock synchronization
30-Jan-2025	10	Updated: Table 1 Table 3 RTC type on STM32 MCUs Table 4 Advanced features for RTC2 type and AN4759_Adv-RTC-features.html#id_33173__table_hqc_shf_rpb RTC prescaler adjustment with LSI measurements Backup registers Low-power management firmware examples
17-Feb-2026	11	Updated: Table 5 Advanced features of RTC3 type RTC clock synchronization External optimization factors

¹ Erasing part of SRAM is also possible.

² Erasing of part of SRAM, caches and cryptographic registers is also possible.

³ Filtering, sampling and precharge configuration, internal pull-up.

⁴ Only two for STM32L4 devices.

⁵ Depends on device category.

⁶ This feature is not available for STM32H503.