STLC4560
Single chip 802.11b/g WLAN radio
Data Brief
Features
Extremely small footprint Ultra low power consumption Fully compliant with the IEEE 802.11b and 802.11g WLAN standards Support for 54, 48, 36, 24, 18, 12, 9, and 6 Mbit/s OFDM, 11 and 5.5 Mbit/s CCK and legacy 2 and 1 Mbit/s data rates Single chip 802.11b/g WLAN solution with fully integrated: zero IF (ZIF) transceiver voltage controlled oscillator (VCO) high-speed A/D and D/A converters OFDM and CCK baseband processor ARM9 media access controller (MAC) Mode selectable SPI or SDIO host interface (up to 48 Mbps) passive components integration PA bias control flexible integrated power management unit glueless FEM interface Intelligent power control, including 802.11 power save mode Fully integrated Bluetooth coexistence
LFBGA240 (8.5x8x1.4mm)
Description
The STLC4560 is a single chip 802.11b/g WLAN radio for embedded, low-power and very small form factor mobile applications. The product conforms to the IEEE 802.11b and 802.11g protocols operating in the 2.45 GHz ISM frequency band supporting OFDM data rates of 54, 48, 36, 24, 18, 12, 9, and 6 Mbit/s as well as CCK data rates of 11 and 5.5 Mbit/s and legacy data rates of 2 and 1 Mbit/s. The STLC4560 is a fully integrated wireless radio including a ZIF transceiver, RF Synthesizer/VCO, high-speed data converters, an OFDM/CCK digital baseband processor, an ARM9-based MAC and a complete power management unit with integrated PA bias control. In addition some passive components are integrated further reducing the overall reference design cost and size. An external FEM completes a highly integrated chip set solution. Host control is provided by a flexible SPI or SDIO serial interface. The SPI interface supports a maximum clock rate of 48 MHz whereas the 4-bit SDIO supports a maximum clock rate of 25 MHz. For maximum flexibility, the STLC4560 accepts system reference clock frequencies of 19.2, 26, 38.4 and 40 MHz. A reference design evaluation platform of hardware and software is provided to system integrators to rapidly enable wireless connectivity to mobile platforms.
Appl ication s
Cellular phones Personal digital assistants (PDA) Portable computers Hand-held data transfer devices Cameras Computer peripherals Cable replacement
January 2008
Rev 1
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www.st.com
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For further information contact your local STMicroelectronics sales office.
Block diagram
STLC4560
1
Figure 1.
Block diagram
Block diagram
STLC4560 Power management unit (PMU) RF ZIF section: FEM: PA, switches, Balun, passives RF VCO Rx down converters Tx up converters baseband filters High speed data converters Switch control SPI I/F Host CPU
FEM I/F
Baseband processor OFDM/CCK modulation
MAC ARM9 WEP Bluetooth device
CXS I/F
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STLC4560
Electrical characteristics
2
Table 1.
Symbol VCC
Electrical characteristics
Absolute maximum ratings
Parameter PMU VBATT Voltage on any other pin VCC to VCC Any GND to GND Within shared voltage rails Test condition Min. -0.3 -0.3 -0.3 -0.3 Typ. Max. 7.0 Vcc + 0.3 +0.3 +0.3 Unit V V V V
Table 2.
Symbol TOP
Operating conditions and input power specifications Parameter Operating temperature range Input supply voltage Power management unit VBATT supply input VBATT = 3.6 V SWx (x={1, 2, 3, 4}) supply input 1.7 Test condition Min. -30 3.0 3 .6 10 VBATT Typ. Max. 85 5.5 Unit
oC
V A V
VBATT supply
Average standby mode current Input supply voltage
VDIG
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Electrical characteristics Table 2.
Symbol Operating conditions and input power specifications (continued) Parameter Test condition Min. Typ. Max.
STLC4560
Unit
Power consumption Input supply voltage Power management unit VBATT supply input 25 oC, POWER_UP = 0V. The resulting current is mainly leakage 25 oC, POWERUP = 1.86 V. The radio is operating on the sleep clock at 32.768 kHz. Sleep mode is a subset of PSM. 3.0 3 .6 5.5 V
Standby current
10
A
Sleep mode current
120
A
VBATT
25 oC, 100 ms Beacon period, 75 byte Beacons Power save mode current @ 1 Mbit/s, short preamble, DTIM = 6 Receive or Idle current 25 oC, the radio is always on, receiving beacons, no TX 25 oC, PSM, receiving packets at 1.9Mbit/s at the application layer 25 oC, the radio is always on, transmitting 1.9Mbit/s at the application layer 25 oC, PSM, transmitting 1.9Mbit/s at the application layer
610
A
195
mA
PSM Receive current
76
mA
Transmit current
199
mA
PSM Transmit current
49
mA
Supply VIO input supply determines host CMOS logic levels for: SPI_CSX, SPI_CLK, SPI_DIN, SPI_DOUT, HOST_IRQ, LF_XTAL_IN, FREQ, RF_ACTIVE, STATUS, TX_CONF VIO = 1.86 V
Input supply voltage VIO
1.62
1.86
1.98
V
Input supply current
0.5
6
mA
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STLC4560
Package mechanical data
3
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
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Package mechanical data Figure 2.
DIM. MIN. A A1 A2 A3 A4 b D D1 E E1 e F ddd eee fff 7.85 0.25 8.35 0.3 8.5 7.5 8 7 0.5 0.5 0.08 0.15 0.05 8.15 0.309 0.15 1.065 0.28 0.8 0.35 8.65 0.010 0.329 0.012 0.335 0.295 0.315 0.276 0.020 0.020 0.003 0.006 0.002 0.321 TYP. MAX. 1.4 0.006 0.042 0.011 0.031 0.014 0.341 MIN. TYP. MAX. 0.055
STLC4560
LFBGA240 mechanical data and package dimensions
mm inch
OUTLINE AND MECHANICAL DATA
Body: 8.5 x 8 x 1.4mm
L F BG A 240 Low Profile Ball Grid Array
7870466 A
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STLC4560
Ordering information
4
Ordering information
Table 3. Ordering information
Order codes STLC4560TRAY STLC4560 Operating temperature range -30C to 85C -30C to 85C Package LFBGA240- (8.5x8x1.4mm) LFBGA240- (8.5x8x1.4mm) Tray Tape and reel Packing
5
Revision history
Table 4.
Date 09-Jan-2008
Document revision history
Revision 1 Initial release. Changes
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STLC4560
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