UM0195 User manual
Getting started with the SPEAr Net evaluation software
Overview
The SPEAr Net board (STEVAL-SPEAR-NET) is designed to evaluate the SPEAr Net microcontroller system with integrated Full speed USB Host controller and Ethernet MAC built around an ARM720T core.The software drivers are developed and designed for use with the IAR Embedded WorkbenchTM Integrated Development Environment (IDE), but are fully reusable with other development tools. The CD-ROM includes software examples prepared to show microcontroller functions and to speed up new application designs. The software tools described in this document are included in the CD-ROM which is delivered with the Starter kit. All examples and libraries are located under the /SW directory. In this directory, you will find:
Example_xxx directories: Complete projects for the IAR Embedded WorkbenchTM IDE with examples for the peripherals. Flashloader_M29Wxxxxx directory: Complete Flashloader project for the IAR Embedded WorkbenchTM IDE which is dedicated for the on-board Flash device. Library directory: Complete library files for peripherals.
Software drivers
The following drivers are available in the library package in the /SW/library directory of the CD-ROM: EDO/SDRAM controller, Static memory controller, I²C, UART, GPIOs, GPTs, Watchdog, RTC, DMA, Interrupt controller (IC), Ethernet MAC controller (DMA/MAC) and Full speed USB Host controller.
Operating systems
4NetOS realtime multitasking network operating system (Smart Network Devices, http://www.smartnd.com/) eCos open source, real-time operating system intended for embedded applications (ported by STMicroelectronics, limited driver support)
Application scope
Industrial Communication Controller (Ethernet Powerlink, EtherNet/IP, PROFInet, Modbus, etc.) Security Remote Controller Printer Server Decentralized Building device controller Companion communication controller for motor drive applications Power Meters
March 2006
Rev 1
1/16
www.st.com
Contents
UM0195
Contents
1 IAR Embedded WorkbenchTM IDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 1.2 IAR Workbench IDE configuration files for SPEAr Net device . . . . . . . . . . 3 Application development . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
Software library . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Software library, project and configuration files . . . . . . . . . . . . . . . . . . . . . 6
3 4 5 6 7 8
Flash loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Ethernet MAC programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 USB programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Real-time operating system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16
UM0195
IAR Embedded WorkbenchTM IDE
1
IAR Embedded WorkbenchTM IDE
The IAR Embedded WorkbenchTM for Windows is an Integrated Development Environment (IDE) helping you to develop and to manage complete embedded application projects. The IAR Embedded Workbench IDE is a framework that integrates all necessary tools:
IAR ARM C/C++ compiler IAR ARM assembler IAR XLINK LinkerTM IAR XAR Library BuilderTM and the IAR XLIB LibrarianTM Code editor Project manager Command line build utility IAR C-SPYTM debugger (state-of-the-art high-level language debugger)
You can find more about the product in the IAR Systems' documentation or at the IAR Systems webpages.
1.1
IAR Workbench IDE configuration files for SPEAr Net device
Before you start developing your embedded application for the SPEAr Net device, you must: 1. 2. Create a new project in the workspace of the IDE Configure your project to be able to communicate properly with the SPEAr Net Evaluation Board
The files described below were developed by STMicroelectronics and are delivered with the SW libraries of the SPEAr Net device.
There are two linker files (XCL) prepared for immediate use in the /SW/library/config directory of the SPEAr Net library structure. STSPEArNet_eval_Flash.xcl is used to link the object files of your compiled application for their storing in Flash and for use with the external RAM. STSPEArNet_eval_ram.xcl can be used to make your application running from the internal shared RAM of the device without storing application data to the Flash device (limited application size).
The device description file (DDF) ioSPEArNet.ddf is a map of the SPEAr Net registers. This file contains device-specific information used during debugging and enables you to see the contents of device registers during your debug steps. FlashSPEArNet.d79 is a Flash Loader file you can use to program the external Flash memory of the on-board Flash device to permanently store your application. This Flash loader is dedicated to the Flash device which is used on the board. If you want to use a different Flash device in your application, you have to slightly modify the source code of the Flash loader which is located under the /SW/ Flashloader_ M29Wxxxxx directory. When you are creating your new project, you can choose the correct chip definition file (i79). This file controls the choice of ARM core, and determines which DDF, XCL and Flash Loader will be used. By default, this file is SPEArNet.i79.
3/16
IAR Embedded WorkbenchTM IDE
UM0195
1.2
Application development
The CD-ROM includes a skeleton project prepared to help you start immediately with your application development. Simply, it is enough just to copy the /SW/library directory content into your application directory. After you open this newly created project, you can start to develop your application. This skeleton project helps to avoid problems with project options and the IDE-related settings described in Section 1.1: IAR Workbench IDE configuration files for SPEAr Net device. Also, you do not have to deal with the IAR Workbench IDE configuration files because they are already prepared in the project directory structure.
4/16
UM0195
Software library
2
Software library
This section provides a brief overview of the library files located under the /SW/library directory. Table 1 enumerates and describes briefly the different files used in the software library. Detailed description of each library function is not part of this document. Figure 1. SW library structure
Automatically compiled and linked to the project
Cstart up.s79 Low_level_init.c hal_gpio .h hal_ic .h Global.h files hal_map.h hal_type.h .... . .... . STSPEArNet.c hal_mac.h hal_gpio .c hal_ic .c hal_mac.c HAL Drivers
Table 1.
File
Library files
Description Asm code that sets up the system before your application starts execution Initialization of stacks, Static/Dynamic controller, IC, etc. Includes the main function, your application starts here Global Configuration/Control/Status registers Direct memory access General Purpose Input / Output General Purpose Timers Inter Integrated Circuits, serial communication Interrupt Controller Interrupt handlers, ISRs Ethernet MAC, DMA-MAC Mapping of peripherals in memory
Cstar tup.s79 STSPEArNet.c hal_cfg.c hal_cfg.h hal_dma.c hal_dma.h hal_gpio.c hal_gpio.h hal_gpt.c hal_gpt.h hal_i2c.c hal_i2c.h hal_ic.c hal_ic.h hal_it.c hal_it.h hal_mac.c hal_mac.h hal_map.h
5/16
Software library Table 1.
File hal_r tc.c hal_r tc.h hal_type.h hal_uar t.c hal_uar t.h hal_usb.c hal_usb.h hal_wd.c hal_wd.h
UM0195 Library files (continued)
Description Real Time Clock General definitions and macros Universal Asynchronous Receiver and Transmitter Universal Serial Bus Watchdog
2.1
Software library, project and configuration files
The software library (/SW/library directory) contains a separate project which can be immediately used to start new application development. This project includes drivers for all peripherals. This directory contains several subdirectories: The Config directory contains the configuration files and also the Flash Loader binary file. This directory includes:
SPEArNet.i79 ioSPEArNet.ddf STSPEArNet_Eval_Flash.xcl STSPEArNet_Eval_RAM.xcl (do not use this file when your application requires interrupts)
FlashSPEArNet.d79 The Settings directory which includes several IAR workbench IDE files:
STSPEArNet.dbgt: debugger desktop settings STSPEArNet.dni: debugger initialization file
STSPEArNet.wsdt The FlashDebug directory contains the linker output, object files and the compiled application image for the Flash version of your application including debug information. The FlashRelease directory contains the linker output, object files and the compiled optimized application image for the Flash version of your application. The RamDebug directory contains the linker output, object files and the compiled application image for internal RAM debug version of your application.
In the root of the library directory, you can also find these files:
STSPEArNet.eww: workspace file STSPEArNet.ewp: IAR workbench IDE project STSPEArNet.ewd: project settings for C-SPY STSPEArNet.dep: dependency information
6/16
UM0195
Flash loader
3
Flash loader
There is a separate project located in the /SW/Flashloader_ M29Wxxxxx directory. You can reuse this project for your own Flash Loader development if you decide to use a different Flash device. You can locate the Flash Loader binary file under /SW/ Flashloader_ M29Wxxxxx /Release/FlashSPEArNet.d79 which you can copy to the /config directory of your project for its immediate use. The Flash Loader acts as a software interface that is downloaded to the target before the real flashing procedure starts. It receives the application to be flashed from the C-SPY debugger and programs it into Flash memory. The Flash Loader uses dedicated API functions for communication with the debugger. The process performs the following steps: 1. 2. 3. 4. 5. 6. The debugger downloads the Flash Loader application into the RAM of the target. The Flash Loader starts execution. The Flash Loader enters the file to be flashed through the dedicated API. The Flash Loader reads the data from the file and writes it to the Flash device. The data written is verified. The flashed application can be started from the Flash device. Flash programming principle
Figure 2.
SPEArNe t board
PC Data fetching
SPEArNet Shared RAM Flash loader AGENT JT AG
Flash
J-Link USB
7/16
Ethernet MAC programming
UM0195
4
Ethernet MAC programming
The SPEAr Net Evaluation Board includes a dedicated Ethernet MAC DMA controller embedded to the MAC peripheral to speed up Ethernet MAC frame processing. The CPU and DMA MAC communicate using the Descriptor list in order to transmit/receive frames on the cable. This list must be properly prepared before initiating any transfer activity to/from the cable. The Descriptor is produced by the CPU and consumed by the DMA MAC. The Descriptor is a 16-byte element that provides the DMA MAC information about how to transmit/receive a single frame and how to report the transfer status back to the CPU. The Descriptor can be stored in any main memory location with a 32-bit aligned address. The first 3 words stored in a Descriptor are expected to be the values of the 3 DMA MAC registers describing a DMA transfer (DMA_Cntl, DMA_Addr and DMA_Next). When the DMA MAC fetches a Descriptor it loads these three values into its own corresponding registers. The last word is to be used by the DMA MAC to report the transfer status. Figure 3. Ethernet DMA/MAC block diagram
APB
AHB
DMA MAC
VCI master config.
VCI master TX
VCI master RX
MAC110
MII
The following is the Descriptor format in C Language notation: struct DMAMAC_Descr { int DMA_Cntl; int DMA_Addr; int DMA_Next; int TxRx_Status; };
8/16
UM0195 Figure 4. DMA Descriptors chain
Ethernet MAC programming
DMA_Cntl DMA_Addr DMA_Next Tx/Rx Status Data of Frame 0
DMA_Cntl DMA_Addr DMA_Next Tx/Rx Status Data of Frame 1
DMA_Cntl DMA_Addr DMA_Next Tx/Rx Status Data of Frame n
Where 1. 2. 3. 4. DMA_Cntl is the content of the DMA control register which is loaded with this data when the current descriptor is started to be processed by the DMA. DMA_Addr is a pointer to the frame data (data to be send or the received one) DMA_Next is a pointer to the next descriptor in the chain. TxRx_Status is a status register of the descriptor with following bits. Tx/Rx Status part of the descriptor
Bits 0 1 2 3 4 5 6 7 8 9 13-10 14 15 16 30-17 31 Function Frame Aborted Reserved No carrier Loss of carrier Excessive deferral Late collision Excessive collisions Under run Deferred Late collision observed Collision count Heart beat fail Reserved VALID bit Reserved Packet retry
Table 2.
9/16
Ethernet MAC programming
UM0195
The VALID bit contains the descriptor ownership information. When set the descriptor is up to date in memory and can be processed by the DMA MAC. When the descriptor is reset, either it is not yet valid or has already been serviced by the DMA MAC. Its status can be checked by the processor. A typical sequence of operation is: 1. 2. The processor loads in memory the first three descriptor words and then set the VALID bit in the fourth descriptor word (new owner: DMA MAC). The DMA loads the descriptor, transfers data and at the end, by the same write operation, saves the packet status coming from the MAC core and resets the VALID bit (new owner: CPU). The processor checks the status and then if needed, updates the descriptor fields and sets again the VALID bit.
3.
10/16
UM0195
USB programming
5
USB programming
The Open Host Controller Interface (OHCI) specification for the Universal Serial Bus is a hardware register level description of a Host Controller for the Universal Serial Bus (USB) which is described by the Universal Serial Bus specification. The purpose of the OHCI is to accelerate USB applications in the marketplace by promoting the use of a common industry software/hardware interface. OHCI enables all the host controller vendors to design and sell Host Controllers with a common software interface. This results in not having dedicated software for every Host controller vendor version, but to keep software drivers as portable as possible between all hardware platforms. The goal is to reduce the complexity of the hardware and software so that OHCI is the simplest possible Host Controller for USB applications. The target audience for this specification are hardware designers, system vendors, and software designers. The SPEAr Net device was designed to comply with the above-mentioned OHCI specification.
11/16
Examples
UM0195
6
Examples
The CD-ROM includes examples to highlight SPEAr Net functions. You can find these examples in the /SW/Example_XXX directories. The examples are prepared to be reused when developing your own application. Table 3 lists available examples and provides a short description of their functions. Table 3. SPEAr Net software examples
Description This example demonstrates SPEAr Net configuration related functions. It checks whether the PLL is locked or not. If the PLL is locked, two LEDs are switched on. This example demonstrates the DMA function. The DMA memory-to-memory transfer of a constant data is shown. After the data transfer, one of the LEDs is switched on. This example demonstrates the GPT function. The example is based on Timer1 and Timer2 functions. Counters are compared with preset values and interrupts are invoked when values are equal. ISRs drive the on-board LEDs. One of the LEDs blinks twice as fast as the second LED. This example demonstrates how to use the I²C interface. This example works with the MEMs board from STMicrolectronics (STMEMSDQ-EVAL1). The MEMs feeds SPEAr Net with information of acceleration from its 3 axis. This example only works when using the MEMs module. This example demonstrates the Ethernet functions. A tiny TCP/IP stack is available with limited features such as ping function, tiny webserver, etc. There is a static IP address 192.168.1.15 used in the example on the SPEAr Net side. Set static IP address at your PC to 192.168.1.20, for example, and connect the board and PC using an UTP cable. Go to a web browser and type http://192.168.1.15 or go to a command line and type ping 192.168.1.15. If you have problems, reset the board and refresh the web browser window. It is also possible to change the TCP/IP example to UDP or pure Ethernet Frames sending in STSpearNet.c main function. If you uncomment MAIN_udp and comment the rest, the board will regularly send UDP frames. If you uncomment MAIN_mac and comment the rest the board will regularly send pure Ethernet Frames. This example demonstrates the UART(RS232) function. The Echo function is already prepared. Just connect a RS232 cross cable to a PC and run Hyperterminal (or a similar terminal application) using settings 9600 1 N. After you run the application, you have to see 'SPEAr Net echo' message in the terminal window. Then what you type on the PC side keyboard you will receive back from SPEAr Net to the terminal window. This example demonstrates the RTC function. The RTC is set to 23:59:53 and the alarm to 23:59:55. When the alarm is generated, LEDs are toggled and the time is reset back to 23:59:53. This function causes the LEDs to blink at 0.5 Hz.
Example Example_CFG
Example_DMA
Example_GPTs
Example_I²C
Example_MAC
Example_UART
Example_RTC
12/16
UM0195 Table 3. SPEAr Net software examples (continued)
Description
Examples
Example
Example_USB
This example demonstrates the USB and Ethernet MAC functions. It is necessary to have an USB mouse with a scroll wheel connected to the board. By scrolling the wheel, LED activity is visible on the board. If you connect the PC directly via an UTP cable, you can use an Internet web browser to view dedicated webpages at http://192.168.1.15 (You have to set a static IP address on your PC, e.g. 192.168.1.20). On the PC display, you can see a mirror of the on-board LEDs. The web page is re-loaded automaticaly after several seconds. If you have problem viewing the webpages, you can refresh the browser window or to reset the board. This example demonstrates the Watchdog functions. If you comment the #define WD_CLEAR line in the STSpearNet.c file, the watchdog counter will be cleared before an overflow. The processor will be not reset. If you uncomment the #define WD_CLEAR line in the STSpearNet.c file, the microcontroller will be reset after the counter overflows. In each example, you can see a different activity of the on-board LEDs. This example tests the external SDRAM of the STEVAL-SPEAR-NET board. Writing and verification of a constant data is implemented. After a successful test, all GPIO LEDS are on. During the test, the LEDs display the process state.
Example_WD
Example_EXTR AMTEST
13/16
Real-time operating system
UM0195
7
Real-time operating system
The 4NetOS, a small and efficient embedded real-time operating system (RTOS) designed for Realtime embedded applications with a focus on flexibility and very fast network communications can run on the SPEAr Net Evaluation Board. Overall system cost is also reduced through its small memory footprint due to its modular construction of drivers and protocol stacks, as well as its dedication to the system on chip market. The RTOS operates in a purely asynchronous mode, increasing system performance by reducing the chance of the system blocking itself, and allowing other tasks to occur while awaiting responses from other network participants. Programming is in C, and Java is also available. The other elements are:
Device Manager being a Hardware Abstraction Layer (HAL) with a standard device access API towards all upper levels File Manager giving access to a local RAM disk and Flash file system as well as to remote file servers Protocol Manager handling ARP, IP, ICMP, UDP, TCP, HTTP, FTP, SNMP, SMTP and modem dial-up/dial-in (via PPP) Java 2 Micro Edition, Connected Limited Device Configuration (CLDC): optional Java Virtual Machine (VM) with very small memory footprint Optional Bluetooth qualified V1.2 protocol stack with Serial Port Profile (SPP) and 7 concurrent connections Optional Realtime Ethernet protocol stacks such as Ethernet Powerlink, EtherNet/IP and PROFInet
For further information and 4NetOS based Starter kit availability (including SPEAr Net based module), please contact Smart Network Devices GmbH (http://www.smartnd.com).
14/16
UM0195
Revision history
8
Revision history
Table 4.
Date 2-Mar-2006
Document revision history
Revision 1 Initial release. Changes
15/16
UM0195
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZE REPRESENTATIVE OF ST, ST PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS, WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
16/16
|
