UM0530 User manual
STEVAL-MKI018V1 adapter board for the LIS244AL
Introduction
The STEVAL-MKI018V1 is an adapter board designed to facilitate the evaluation of the LIS244AL two-axis analog output linear accelerometer. The board offers an effective solution for fast system prototyping and device evaluation directly within the user's own application. The STEVAL-MKI018V1 can be plugged into a standard DIL 24 socket. The adapter provides the complete LIS244AL pinout and comes ready-to-use with the required decoupling capacitors on the Vdd power supply line. The pinout of the adapter is fully compatible with all other available adapter boards, making it possible to switch from one sensor to another easily during device evaluation without the need for board redesign. This user manual provides information on the STEVAL-MKI018V1 adapter only. For details regarding the LIS244AL specifications, please refer to the datasheet for the device.
June 2008
Rev 1
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Adapter board layout and pin description
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Adapter board layout and pin description
A photograph of the adapter board is shown in Figure 1, together with an illustration of the top silk-screen layer and the board layout. Figure 1.
Pin #1
Adapter board photograph, top silk-screen layer and board layout
In addition to the MEMS sensor, the adapter board includes two filtering capacitors (10 F and 100 nF, respectively) on the analog Vdd power supply line. The pin description of the STEVAL-MKI018V1 is provided in Table 1. Table 1. STEVAL-MKI018V1 pin description
Pin name Vdd NC Voutx Vouty GND ST Power supply Not connected Output voltage X channel Output voltage Y channel 0 V supply Self-test (logic 0: normal mode; logic 1: self-test) Function
Adapter board pin # 1 2-3, 5, 7, 9-12, 14-15, 17-24 4 6 13 16
For additional information regarding the use of the LIS244AL 2-axis accelerometer, please refer to the device datasheet.
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Schematic and connection diagram
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Schematic and connection diagram
Figure 2. Schematic and connection diagram for the STEVAL-MKI018V1
P01 C1 10 0n F P13 + C2 10 uF
P01
P01
U1 LIS24 4A L P01 P02 P03 P04 P05 P06 P07 P08 P09 P10 P11 P12 JP1 1 2 3 4 5 6 7 8 9 10 11 12 JP2 24 23 22 21 20 19 18 17 16 15 14 13 P24 P23 P22 P21 P20 P19 P18 P17 P16 P15 P14 P13
16
14 VD D
Res
NC
15
NC
13
P17 P16 P13
1 2 3 4
NC ST GN D NC
Vo ut X NC Vo ut Y
12 11 10 9
P04
P06
Vo ut Z
NC
GN D
GN D
GN D
Head er 12 Head er 12
5
6
7 P13
R1 0R
P13
P18
P13
P08
8
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Revision history
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Revision history
Table 2.
Date 24-Jun-2008
Document revision history
Revision 1 Initial release. Changes
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