J-SIGN4
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Java Card for digital signatures

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製品概要

概要

The J-SIGN4 is a smartcard implementing a secure signature-creation device (SSCD) with key generation as described in the CNS application (Italian citizen service card) and according to protection profiles EN 419211-2, EN 419211-4 and EN 419211-5.

It is based on a 32-bit Arm® SecurCore® SC000™ RISC core.

Arm and SecurCore are registered trademarks of Arm Limited (or its subsidiaries or its affiliates) in the US and/or elsewhere.

The Arm word and logo are trademarks of Arm Limited (or its subsidiaries or its affiliates) in the US and/or elsewhere. All rights reserved.

The J-SIGN4 is designed to be versatile: it guarantees high performance to secure applications, and grants the highest security level in terms of CC security certification on the hardware (EAL5+) and on the operating system (EAL4+).

It is intended to provide all required capabilities to devices involved in creating qualified electronic signatures.

The main J-SIGN4 functionality covers the following areas:

  • Cryptographic-key generation and secure management
  • Secure-signature generation with secure management of data to be signed
  • Identification and authentication (I&A) of trusted users and applications
  • Data storage and protection from modification or disclosures
  • Secure exchange of sensitive data between the MCU and a trusted application
  • Secure exchange of sensitive data between the MCU and a trusted human-interface device

  • 機能一覧

    • Hardware features
      • Arm® SecurCore® SC000™ 32-bit RISC core
      • Contact assignment compatible with ISO/IEC 7816-3 standards
      • Asynchronous receiver transmitter (IART) for high-speed serial data support (ISO/IEC 7816- 3 and EMV® compliant)
      • RF universal asynchronous receiver transmitter (RFUART) in contactless mode compliant with ISO/IEC 14443 Type A at up to 848 Kbps
      • ISO/IEC 7816 T=0 and T=1 fully supported
      • Electrostatic discharge (ESD) protection greater (HBM) on contact and contactless input/outputs
      • 2.7 V to 5.5 V supply voltages
      • AIS-31 class PTG.2 compliant true random number generator (TRNG)
      • Enhanced cryptographic algorithms
        • DES/3DES (data encryption standard), AES (advanced encryption standard), RSA and ECC (elliptic curve cryptography)
        • SHA-1, SHA-256, SHA-384, SHA-512, MD5, CRC16 and CRC32
      • NESCRYPT (next step cryptoprocessor) coprocessor for public key cryptography
      • Differential power analysis (DPA) and differential fault analysis (DFA) countermeasures against side-channel attacks
    • Security features
      • Active shield
      • Memory protection unit (MPU)
      • Unique serial number on each die
      • Enhanced NESCRYPT cryptoprocessor for public key cryptography: RSA, ECC, elliptic curve digital signature algorithm (ECDSA)
      • Hardware security enhanced DES accelerator
      • Random number generation compliant with PTG.2 Class and DRG.3 Class as defined in AIS-31
      • Hashing algorithm: SHA1, SHA-224, SHA-256, SHA-384 and SHA-512
      • Ciphering/Deciphering algorithm: DES/3DES Electronic codebook (ECB) and Cipher-block chaining (CBC) up to 192 bits, AES (up to 256 bits), RSA (up to 2048 bits)
      • RSA (up to 2048 bits) and EC (up to 521 bits) key pair generation
      • Digital signatures: ECDSA (EC over GF(p) up to 521 bits), RSA-PSS, RSA PKCS#1
      • Key agreement schemes: Diffie-Hellmann, ECDH
      • Checksum algorithm: ISO 3309 CRC-16, CRC-32
      • DPA and DFA countermeasures against side-channel attacks

EDA Symbols, Footprints and 3D Models

STMicroelectronics - J-SIGN4

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Quality and Reliability

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