EVALSP1340CPU

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Design Win

SPEAr1340 CPU evaluation board

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製品概要

概要

The evaluation board revision 2.2 is used to enable quick evaluation and debugging of software for the SPEAr1340 embedded MPU. It acts as a learning tool for rapid familiarity with the features of the SPEAr1340, as well as providing a reference design to use as a starting point for the development of a final application board.

The EVALSP1340CPU board is equipped with interfaces to the high-speed peripherals embedded in SPEAr1340 device.

  • 特徴

    • SPEAr1340 embedded MPU
    • 4 DDR3 chips (32-bit) 1 GB
    • Serial NOR Flash, 8 MB
    • 8-bit NAND Flash, 2 Gb
    • 16-bit NAND Flash expansion connector
    • Audio stereo jack and microphone
    • Two USB 2.0 high speed host ports
    • One OTG 2.0 high speed port (Micro USB-AB)
    • One 10/100/1000 Ethernet port
    • One PCIe X1 Root Complex connector
    • One SATA connector
    • One SDIO connector
    • One UART serial port (up to 115 Kbaud)
    • LCD connectors (LVDS bus - TFT panel)
    • Camera module
    • MEMS (accelerometer & magnetometer)
    • Debug port (CPU JTAG connector)
    • 10" LCD kit - order code EVALSP1340LCD (optional)
    • CLCD Video HDMI transmitter plugboard - order code EVALSP1340HDM (optional)