STM32F398VE

量産中
Education

Mainstream Mixed signals MCUs Arm Cortex-M4 core with DSP and FPU, 512 Kbytes of Flash memory, 72 MHz CPU, MPU, CCM, 12-bit ADC 5Msps, PGA, comparators

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製品概要

概要

The STM32F398VE is based on the high-performance ARM®Cortex®-M4 32-bit RISC core with FPU operating at a frequency of 72 MHz, and embedding a floating point unit (FPU), a memory protection unit (MPU) and an embedded trace macrocell (ETM). The family incorporates high-speed embedded memories (512 Kbyte of Flash memory, 80 Kbyte of SRAM), a flexible memory controller (FSMC) for static memories (SRAM, PSRAM, NOR and NAND), and an extensive range of enhanced I/Os and peripherals connected to an AHB and two APB buses. The device offers four fast 12-bit ADCs (5 Msps), seven comparators, four operational amplifiers, two DAC channel, a low-power RTC, up to five general-purpose 16-bit timers, one general-purpose 32-bit timer, and three timers dedicated to motor control. They also feature standard and advanced communication interfaces: up to three I2Cs, up to four SPIs (two SPIs are with multiplexed full-duplex I2Ss), three USARTs, up to two UARTs and CAN. To achieve audio class accuracy, the I2S peripherals can be clocked via an external PLL.
The STM32F398VE operates in the -40 to +85°C and -40 to +105°C temperature ranges at 1.8 V ± 8% power supply. A comprehensive set of power-saving mode allows the design of low-power applications.
The STM32F398VE offers devices in LQFP100 package.
The set of included peripherals changes with the device chosen.
  • 特徴

    • Core: ARM®Cortex®-M4 32-bit CPU with 72 MHz FPU, single-cycle multiplication and HW division, DSP instruction and MPU (memory protection unit)
    • Memories
      • Up to 512 Kbytes of Flash memory
      • 64 Kbytes of SRAM, with HW parity check implemented on the first 32 Kbytes.
      • Routine booster: 16 Kbytes of SRAM on instruction and data bus, with HW parity check (CCM)
      • Flexible memory controller (FSMC) for static memories, with four Chip Select
    • CRC calculation unit
    • Reset and supply management
      • Low power modes: Sleep and Stop
      • Supply: VDD = 1.8 V ± 8%VDDAvoltage range = 1.65 V to 3.6 V
      • VBATsupply for RTC and backup registers
    • Clock management
      • 4 to 32 MHz crystal oscillator
      • 32 kHz oscillator for RTC with calibration
      • Internal 8 MHz RC with x 16 PLL option
      • Internal 40 kHz oscillator
    • Up to 85 fast I/Os
      • All mappable on external interrupt vectors
      • Several 5 V-tolerant
    • Interconnect matrix
    • 12-channel DMA controller
    • Four ADCs 0.20 μs (up to 38 channels) with selectable resolution of 12/10/8/6 bits, 0 to 3.6 V conversion range, separate analog supply from 1.8 to 3.6 V
    • Two 12-bit DAC channels with analog supply from 2.4 to 3.6 V
    • Seven ultra-fast rail-to-rail analog comparators with analog supply from 1.8 to 3.6 V
    • Four operational amplifiers that can be used in PGA mode, all terminals accessible with analog supply from 2.4 to 3.6 V
    • Up to 24 capacitive sensing channels supporting touchkey, linear and rotary touch sensors
    • Up to 14 timers
      • One 32-bit timer and two 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
      • Three 16-bit 6-channel advanced-control timers, with up to six PWM channels, deadtime generation and emergency stop
      • One 16-bit timer with two IC/OCs, one OCN/PWM, deadtime generation and emergency stop
      • Two 16-bit timers with IC/OC/OCN/PWM, deadtime generation and emergency stop
      • Two watchdog timers (independent, window)
      • One SysTick timer: 24-bit downcounter
      • Two 16-bit basic timers to drive the DAC
    • Calendar RTC with Alarm, periodic wakeup from Stop/Standby
    • Communication interfaces
      • CAN interface (2.0B Active)
      • Three I2C Fast mode plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from STOP
      • Up to five USART/UARTs (ISO 7816 interface, LIN, IrDA, modem control)
      • Up to four SPIs, 4 to 16 programmable bit frames, two with multiplexed half/full duplex I2S interface
      • Infrared transmitter
    • SWD, Cortex®-M4 with FPU ETM, JTAG
    • 96-bit unique ID

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