STM32H7P4ZG
Evaluation
Education Design Win
High-Performance Arm Cortex-M7 MCU, 520 MHz, 1 MB flash, 320 KB RAM, DSP accelerator (HSP), 4x 12-bit ADC, 2x HRTimer

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製品概要

概要

STM32H7Pxxx devices are based on the high-performance Arm® Cortex®-M7 32-bit RISC core operating at up to 520 MHz. The Cortex®-M7 core features a floating-point unit (FPU) which supports Arm® double-precision (IEEE 754 compliant) and single-precision data-processing instructions and data types. STM32H7Pxxx devices support a full set of DSP instructions and a memory protection unit (MPU) to enhance application security.

In addition to the CPU, all devices include a high-performance signal processing (HSP) unit capable of accelerating and off loading mathematical and signal processing tasks. Specific part numbers incorporate STMicroelectronics Neural‑ART Accelerator.

STM32H7Pxxx devices incorporate high-speed embedded memories with a dual-bank flash memory of 2 Mbytes, 736 Kbytes of RAM (including 320 Kbytes of TCM RAM, 416 Kbytes of user SRAM and 4 Kbytes of backup SRAM), as well as an extensive range of enhanced I/Os and peripherals connected to three APB buses, five AHB buses, a 32-bit multilayer AHB bus matrix, and a 64-bit AXI interconnect for internal and external memory access.

All the devices offer four ADCs, eight DACs, of which six dedicated to internal voltage comparators, eight fast voltage comparators, a filter for a digital microphone, a low-power RTC, four 32-bit timers, nine general-purpose 16-bit timers, three PWM 16-bit timers for motor control, two basic timers, five low-power timers, a true random number generator (RNG) and a HASH accelerator.

All devices also feature the following communication interfaces:

  • Standard interfaces
    • Three I2Cs and one I3C
    • Five USARTs, five UARTs, and one LPUART
    • Six SPIs, three with I2S in full-duplex mode. To achieve audio class accuracy, the I2S peripherals can be clocked via an external clock to allow synchronization.
    • One SDMMC interface
    • A USB OTG full-speed
    • Three FDCAN interfaces
  • Advanced interfaces including
    • A flexible memory control (FMC) interface
    • An octo-SPI memory interface

Refer to Table 1 for the list of peripherals available on each part number.

STM32H7Pxxx devices operate in the -40 to +125°C ambient temperature range from a 1.71 to 3.6 V power supply. The supply voltage must stay above 1.71 V which is the embedded power voltage detector threshold. The device embeds an integrated voltage regulator to supply the core, or a high efficiency SMPS depending on the part number.

A comprehensive set of power-saving modes allows the design of low-power applications.

The CPU and domain states can be directly monitored on some GPIOs configured as alternate functions. STM32H7Pxxx devices are offered in several packages ranging from 100 to 176 pins/balls.

These features make the STM32H7Pxxx microcontrollers suitable for a wide range of applications:

  • Industrial applications: PLC, inverters, circuit breakers
  • 機能一覧

    • Includes ST state-of-the-art patented technology.
    • Cores
      • 32-bit Arm® Cortex®-M7 core with DP-FPU and L1 cache: 32 Kbytes of data and 32 Kbytes of instruction cache allowing to fill one cache line in a single access from the 128-bit embedded flash memory, frequency up to 520 MHz, MPU, 2773 CoreMark® (5.33 CoreMark®/MHz), and DSP instructions
    • Neural processing unit (NPU)
      • ST Neural-ART Accelerator, frequency up to 520 MHz, 85 Gops
      • Specialized hardware units for DNN (deep-neural network) inference functions
      • Flexible dedicated stream processing engine
    • Signal processing unit (HSP)
      • Hardware signal processor (HSP) enabling matrix, vector and digital signal processing operation
      • 32-bit floating point support
      • Matrix / vector algebra, (i)FFT transform, filtering & convolution, math operators
    • Mathematical acceleration
      • CORDIC for trigonometric functions acceleration
      • FMAC: Filter mathematical accelerator
    • Memories
      • Up to 2 Mbytes dual bank flash memory plus 1 Kbyte of OTP memory
      • 736 Kbytes of on-chip RAM: 192 Kbytes of ITCM SRAM + 128 Kbytes of DTCM SRAM for time critical routines, 416 Kbytes of user SRAM, and 4 Kbytes of SRAM in backup domain
      • Octo-SPI memory interface with support for serial PSRAM/NOR, hyper RAM/flash frame formats, running up to 100 MHz in SRD mode and DTR mode
      • Flexible external memory controller with up to 16-bit data bus:
        • SRAM, PSRAM, NOR flash memory clocked up to 100 MHz in synchronous mode
        • SDRAM/LPSDR SDRAM
        • 8/16-bit NAND flash memories
      • CRC calculation unit
    • Security
      • ROP, PC-ROP, active tamper, secure firmware upgrade support, secure access mode
      • HASH (MD5, SHA-1, SHA-2), HMAC
      • 1x 32-bit, NIST SP 800-90B compliant, true random generator
    • Reset and power management
      • 1.71 to 3.6 V application supply and I/Os
      • POR, PDR, PVD and BOR
      • Integrated high efficiency SMPS step-down converter or LDO regulator
      • Voltage scaling in Run and Stop mode
      • Backup regulator (~0.9 V)
      • Low-power modes: Sleep, Stop and Standby
      • VBAT battery operating mode with charging capability
      • CPU power state monitoring pins
    • Low-power consumption
      • Stop: down to TBD µA with full RAM retention
      • Standby: TBD µA (backup SRAM Off, RTC/LSE On)
      • VBAT: TBD µA (RTC and LSE On)
    • Clock management
      • Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI
      • External oscillators: 4-50 MHz HSE, 32.768 kHz LSE
      • 3× PLLs (1 for the system clock, 2 for kernel clocks) with fractional mode
    • General-purpose inputs/outputs
      • Up to 134 I/O ports with interrupt capability
      • Fast I/Os capable of up to 133 MHz
      • Up to 132 5-V-tolerant I/Os
    • Interconnect matrix
      • 64-bit high bandwidth AXI interconnect with programmable priority
      • 32-bit AHB matrix
      • Independent peripheral buses (6 × AHB, 3 × APB)
    • 2 DMA controllers to offload the CPU
      • High-performance direct memory access controller (HPDMA) on AXI interconnect
      • General purpose direct memory access controller (GPDMA) on AHB interconnect
    • Up to 20 communication peripherals
      • 3× I2C FM+ interfaces (SMBus/PMBus)
      • 1× I3C
      • 5× USART + 5× UART (ISO7816 interface, LIN, IrDA, modem control) and 1× LPUART
      • 6× SPI, including 3 with full-duplex I2S audio class accuracy
      • 1× SD/SDIO/MMC interfaces (up to 100 MHz)
      • 3× CAN-FD controllers
      • 1× USB OTG full speed interfaces
    • Analog peripherals
      • 4× 12-bit ADCs, up to 5 MSPS and 44 channels
      • 1× internal voltage reference (1.8 – 2.9 V)
      • 1× analog and 1x digital temperature sensors
      • 1× 12-bit dual-channel DAC with output buffers + 3× 12-bit dual-channel fast DAC for internal use
      • 8× fast comparators with window mode
      • 1× CIC decimation filter for PDM digital microphone
    • Up to 27 timers and 2 watchdogs
      • 2× high resolution timers for precise PWM control (up to 520 MHz)
      • 4× 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input (up to 520 MHz)
      • 3× 16-bit advanced motor control timers (up to 520 MHz)
      • 9× 16-bit general-purpose timers (up to 520 MHz)
      • 2× 16-bit general-purpose timers (up to 520 MHz)
      • 5× 16-bit low-power timers (up to 100 MHz)
      • 2× watchdogs (independent and window)
      • 1× SysTick timer
      • RTC with sub-second accuracy and hardware calendar
    • Debug mode
      • SWD and JTAG interfaces
      • 4 KB embedded trace buffer
    • 96-bit unique ID
    • All packages are ECOPACK2 compliant

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Quality and Reliability

Part Number Marketing Status Package Grade RoHSコンプライアンスグレード Longevity Commitment Longevity Starting Date Material Declaration**
STM32H7P4ZIZ3Q
Evaluation
LQFP-EP 144 20x20x1.4 mm Industrial Ecopack2 10 2026-11-03T00:00:00.000+01:00

STM32H7P4ZIZ3Q

Package:

LQFP-EP 144 20x20x1.4 mm

Material Declaration**:

Marketing Status

Evaluation

Package

LQFP-EP 144 20x20x1.4 mm

Grade

Industrial

RoHS Compliance Grade

Ecopack2

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Package
Packing Type
RoHS
Country of Origin
ECCN (US)
ECCN (EU)
Operating temperature (°C)
D/A Converters (typ) (12-bit)
Timers (typ) (16-bit)
Timers (typ) (32-bit)
Number of Channels (typ)
SMPS
Number of Channels (typ)
UART (typ)
I/Os (High Current)
Integrated op-amps
Comparator
SPI (typ)
USART (typ)
Number of Channels (typ)
I2S (typ)
Advanced Motor Control Timers
CAN (2.0)
CAN (FD)
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STM32H7P4ZIZ3Q

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STM32H7P4ZIZ3Q Evaluation

Budgetary Price (US$)*/Qty:
-
Package:
Packing Type:
RoHS:
Country of Origin:
ECCN (US):
ECCN (EU):

Part Number:

STM32H7P4ZIZ3Q

Operating Temperature (°C)

Min:

Max:

D/A Converters (typ) (12-bit):

8

Timers (typ) (16-bit):

16

Timers (typ) (32-bit):

4

Number of Channels (typ):

-

SMPS:

Internal

Number of Channels (typ):

-

UART (typ):

6

I/Os (High Current):

-

Integrated op-amps:

-

Comparator:

8

SPI (typ):

6

USART (typ):

5

Number of Channels (typ):

44

I2S (typ):

-

Advanced Motor Control Timers:

3

CAN (2.0):

-

CAN (FD):

3

Ethernet:

-

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販売代理店在庫データ:

(*)概算用の参考価格(US$)です。現地通貨でのお見積りについては、STのセールス・オフィスまたは販売代理店までお問い合わせください。