LDLN015

生産終了
Design Win

150 mA - ultra low noise - high PSRR linear voltage regulator IC

Download datasheet

製品概要

概要

The LDLN015 is an ultra low noise linear regulator which provides 150 mA maximum current from an input voltage ranging from 2.1 V to 5.5 V with a typical dropout voltage of 86 mV. With its 6.3 µ VRMS noise value in a band from 10 Hz to 100 kHz, the LDLN015 provides a very clean output suitable for ultra sensitive loads. It is stable with ceramic capacitors. High PSRR, low quiescent current and very low noise features make it suitable for low power battery powered applications. Power supply rejection is higher than 90 dB at low frequencies and starts to roll off at 10 kHz. The enable logic control function puts the LDLN015 into shutdown mode allowing a total current consumption lower than 1 µA. The device also includes a short-circuit constant current limiting and thermal protection. Typical applications are noise sensitive loads like ADC, VCO in mobile phones, and personal digital assistants (PDAs).

  • 特徴

    • Ultra low noise: 6.3 µVRMS from 10 Hz to 100 kHz
    • Input voltage from 2.1 to 5.5 V
    • Very low quiescent current (35 µA typ. at no load, 70 µA typ. at 150 mA load; 2 µA max. in off mode)
    • Output voltage tolerance: ± 1% at 25 °C
    • 150 mA guaranteed output current
    • Wide range of output voltage from 0.8 V to 3.3 V with 100 mV step
    • Logic-controlled electronic shutdown
    • Compatible with ceramic capacitor (COUT = 0.47 µF)
    • No bypass capacitor is required
    • Internal current and thermal limit
    • Package DFN6 (2 x 2 mm)
    • Temperature range: - 40 °C to 125 °C

EDAシンボル / フットプリント / 3Dモデル

STMicroelectronics - LDLN015

Speed up your design by downloading all the EDA symbols, footprints and 3D models for your application. You have access to a large number of CAD formats to fit with your design toolchain.

Please select one model supplier :

Symbols

EDAシンボル

Footprints

フットプリント

3D model

3Dモデル