The M40SZ100W NVRAM controller is a self-contained device which converts a standard low-power SRAM into a non-volatile memory. A precision voltage reference and comparator monitors the VCCinput for an out-of-tolerance condition.
When an invalid VCCcondition occurs, the conditioned chip enable output (ECON)is forced inactive to write protect the stored data in the SRAM. During a power failure, the SRAM is switched from the VCCpin to the external battery to provide the energy required for data retention. On a subsequent power-up, the SRAM remains write-protected until a valid power condition returns.
- Convert low power SRAMs into NVRAMs
- 3 V operating voltage
- Precision power monitoring and power switching circuitry
- Automatic write-protection when VCCis out-of-tolerance
- Choice of supply voltage and power-fail deselect voltage:
- VCC= 2.7 to 3.6 V; 2.55 V ≤ VPFD≤ 2.70 V
- Reset output (RST) for power on reset
- 1.25 V reference (for PFI/PFO)
- Less than 15 ns chip enable access propagation delay
- Battery low pin (BL)
- RoHS compliant
- Lead-free second level interconnect
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