SPC564A80B4

量産中
Education

32-bit Power Architecture MCU for Automotive Powertrain Applications

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製品概要

概要

The microcontroller’s e200z4 host processor core is built on Power Architecture technology and designed specifically for embedded applications. In addition to the Power Architecture technology, this core supports instructions for digital signal processing (DSP).
  • 特徴

    • 150 MHz e200z4 Power Architecture core
      • Variable length instruction encoding (VLE)
      • Superscalar architecture with 2 execution units
      • Up to 2 integer or floating point instructions per cycle
      • Up to 4 multiply and accumulate operations per cycle
    • Memory organization
      • 4 MB on-chip flash memory with ECC and Read While Write (RWW)
      • 192 KB on-chip RAM with standby functionality (32 KB) and ECC
      • 8 KB instruction cache (with line locking), configurable as 2- or 4-way
      • 14 + 3 KB eTPU code and data RAM
      • 5 × 4 crossbar switch (XBAR)
      • 24-entry MMU
      • External Bus Interface (EBI) with slave and master port
    • Fail Safe Protection
      • 16-entry Memory Protection Unit (MPU)
      • CRC unit with 3 sub-modules
      • Junction temperature sensor
    • Interrupts
      • Configurable interrupt controller (with NMI)
      • 64-channel DMA
    • Serial channels
      • 3 × eSCI
      • 3 × DSPI (2 of which support downstream Micro Second Channel [MSC])
      • 3 × FlexCAN with 64 messages each
      • 1 × FlexRay module (V2.1) up to 10 Mbit/s with dual or single channel and 128 message objects and ECC
    • 1 × eMIOS
      • 24 unified channels
    • 1 × eTPU2 (second generation eTPU)
      • 32 standard channels
      • 1 × reaction module (6 channels with three outputs per channel)
    • 2 enhanced queued analog-to-digital converters (eQADCs)
      • Forty 12-bit input channels (multiplexed on 2 ADCs); expandable to 56 channels with external multiplexers
      • 6 command queues
      • Trigger and DMA support
      • 688 ns minimum conversion time
    • On-chip CAN/SCI/FlexRay Bootstrap loader with Boot Assist Module (BAM)
    • Nexus: Class 3+ for core; Class 1 for the eTPU
    • JTAG (5-pin)
    • Development Trigger Semaphore (DTS)
    • Clock generation
      • On-chip 4–40 MHz main oscillator
      • On-chip FMPLL (frequency-modulated phase-locked loop)
    • Up to 120 general purpose I/O lines
      • Individually programmable as input, output or special function
      • Programmable threshold (hysteresis)
    • Power reduction mode: slow, stop and stand-by modes
    • Flexible supply scheme
      • 5 V single supply with external ballast
      • Multiple external supply: 5 V, 3.3 V and 1.2 V
    • Designed for LQFP176, LBGA208, PBGA324 and Known Good Die (KGD)

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EDAシンボル / フットプリント / 3Dモデル

STMicroelectronics - SPC564A80B4

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EDAシンボル

Footprints

フットプリント

3D model

3Dモデル

品質 & 信頼性

製品型番 マーケティング・ステータス パッケージ グレード RoHSコンプライアンスグレード 材料宣誓書**
SPC564A80B4CFAR
量産中
PBGA 324 23x23x1.82 オートモーティブ Ecopack2

SPC564A80B4CFAR

Package:

PBGA 324 23x23x1.82

Material Declaration**:

Marketing Status

量産中

Package

PBGA 324 23x23x1.82

Grade

Automotive

RoHS Compliance Grade

Ecopack2

(**) st.comで提供している材料宣誓書は、パッケージ・ファミリ内で最も一般的に使用されているパッケージに基づく汎用ドキュメントの場合があります。そのため、特定の製品では100%正確ではない可能性があります。特定の製品情報については、セールスサポートまでお問い合わせください

サンプル & 購入

製品型番
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製品ステータス
ECCN (US)
ECCN (EU)
梱包タイプ
パッケージ
温度(℃) CPU Clock Frequency (MHz) (max)
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詳細情報
最小
最大
SPC564A80B4CFAR

販売代理店に在庫がない場合は、STのセールス・オフィスまでお問い合わせください

量産中
5A991B4A NEC Tape And Reel PBGA 324 23x23x1.82 -40 125 150 22.55 / 1k
詳細情報

Flash Size (kB) (Data):

-

Features set:

Flexray

単価(US$):

22.55

Country of Origin:

MALAYSIA

SPC564A80B4CFAR

製品ステータス

量産中

ECCN (US)

5A991B4A

Budgetary Price (US$)*/Qty

22.55 / 1k

ECCN (EU)

NEC

梱包タイプ

Tape And Reel

パッケージ

PBGA 324 23x23x1.82

Operating Temperature (°C)

(最小)

-40

(最大)

125

CPU Clock Frequency (MHz) (max)

150

Flash Size (kB) (Data)

-

Features set

Flexray

Budgetary Price (US$)* / Qty

22.55 / 1k

Country of Origin

MALAYSIA

(*)概算用の参考価格(US$)です。現地通貨でのお見積りについては、STのセールス・オフィスまたは販売代理店までお問い合わせください。